UC3842AN ON Semiconductor, UC3842AN Datasheet - Page 12

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UC3842AN

Manufacturer Part Number
UC3842AN
Description
IC CTRLR CURRENT MODE HP 8DIP
Manufacturer
ON Semiconductor
Type
High Performance Current Mode Controllersr
Datasheet

Specifications of UC3842AN

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
500kHz
Duty Cycle
96%
Voltage - Supply
11.5 V ~ 25 V
Buck
No
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Frequency-max
500kHz
Output Voltage Range
4.9 V to 5.1 V
Input Voltage Range
30 V
Operating Temperature Range
0 C to + 70 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
UC3842ANOS

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V
Clamp
C
R2
R1
External
Sync
Input
8(14)
R2
R1
4(7)
2(3)
1(1)
=
Figure 23. Adjustable Reduction of Clamp Level
Figure 21. External Clock Synchronization
8(14)
Figure 25. Adjustable Buffered Reduction of
V
4(7)
2(3)
1(1)
MPSA63
Clamp
R
R
The diode clamp is required if the Sync amplitude is large enough to
cause the bottom side of CT to go more than 300 mV below ground.
1.67
2
1
0.01
+
=
+ 1
EA
R
R
+
R
R
Clamp Level with Soft−Start
+
EA
+ 0.33 x 10 − 3
1.67
2
1
R
R
Osc
1.0mA
Bias
+
C
+ 1
R
47
T
Osc
1.0mA
T
Bias
2R
R
V
2R
ref
8(14)
I
4(7)
2(3)
1(1)
R
pk(max)
5(9)
V
t
Clamp
Softstart
R
5(9)
R
+
1.0V
V
1
=
5.0V
1
Clamp
+ R
R
+
1.0V
+
5.0V
UC3842A, UC3843A, UC2842A, UC2843A
+
2
+
ref
2
= − In
VClamp
+
EA
+
RS
Comp/Latch
R
R
ref
S
R
Comp/Latch
+
Q
Osc
S
R
Bias
Q
I
pk(max)
1 −
Where: 0 ≤ V
+
2R
Where: 0 ≤ V
+
R
+
3V
7(12)
=
+
V
Clamp
7(12)
C
5(9)
VClamp
Clamp
http://onsemi.com
RS
Clamp
V
CC
7(11)
6(10)
5(8)
3(5)
V
C
CC
≤ 1.0 V
7(11)
6(10)
5(8)
3(5)
≤ 1.0 V
R
R
1
1
+ R
R
12
2
Q1
Q1
R
2
V
R
V
S
in
f =
S
in
R
R
C
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over current conditions, a
reduction of the I
B
(R
A
6
5
2
A
+
1.44
+ 2R
Figure 26. Current Sensing Power MOSFET
Figure 22. External Duty Cycle Clamp and
5.0V
+
+
B
ref
8
5.0k
1
)C
5.0k
+
+
Comp/Latch
C
S
R
pk(max)
MC1455
Q
Multi Unit Synchronization
1.0M
R
S
D
Control CIrcuitry
8(14)
Q
max
4(7)
2(3)
1(1)
+
To Pin (9)
4
t
Ground:
clamp level must be implemented. Refer to Figures 23 and 25.
Soft−Start
Figure 24. Soft−Start Circuit
=
+
(12)
R
A
 3600C in mF
R
+ 2R
+
B
EA
7
R
R
3
V
B
CC
(11)
(10)
(8)
(5)
+
Osc
1.0mA
Bias
G
1/4 W
R
8(14)
M
S
2R
D
4(7)
2(3)
1(1)
R
SENSEFET
V
To
Additional
UCX84XA’s
in
K
To Input Source
Power Ground
S
5(9)
If: SENSEFET = MTP10N10M
Return
V
Pin
+
+
1.0V
5.0V
Then: V
EA
5 =
R
R
+
+
+
ref
Osc
R
r
pin
Bias
S
DM(on)
R
S
R
I
S
5 = 0.075 I
pk
Q
= 200
2R
r
+ R
DS(on)
R
S
5(9)
pk

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