UC3843BVDG ON Semiconductor, UC3843BVDG Datasheet - Page 13
![IC CTRLR CURRENT MODE HP 14SOIC](/photos/6/57/65767/14-soic_751a_sml.jpg)
UC3843BVDG
Manufacturer Part Number
UC3843BVDG
Description
IC CTRLR CURRENT MODE HP 14SOIC
Manufacturer
ON Semiconductor
Datasheet
1.UC3842BDR2G.pdf
(21 pages)
Specifications of UC3843BVDG
Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
96%
Voltage - Supply
8.2 V ~ 25 V
Buck
No
Boost
Yes
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 105°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Frequency-max
275kHz
Duty Cycle (max)
96 %
Output Current
1000 mA
Mounting Style
SMD/SMT
Switching Frequency
500 KHz
Maximum Operating Temperature
+ 105 C
Fall Time
50 ns
Minimum Operating Temperature
- 40 C
Rise Time
50 ns
Synchronous Pin
No
Topology
Boost, Flyback, Forward
Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Switching Freq
500KHz
Operating Supply Voltage (max)
30V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Package Type
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
UC3843BVDGOS
+
-
5.0V Ref
Comp/Latch
R
S
Q
Figure 28. MOSFET Parasitic Oscillations
Figure 30. Isolated MOSFET Drive
Series gate resistor R
caused by the MOSFET input capacitance and any series wiring inductance in
the gate-source circuit.
+
-
5.0V Ref
7(12)
Comp/Latch
+
-
V
CC
7(11)
6(10)
5(8)
3(5)
g
R
S
will damp any high frequency parasitic oscillations
C
Q
Boundary
Isolation
R
R
S
7(12)
+
-
N
V
S
CC
Q1
7(11)
6(10)
5(8)
3(5)
R
g
V
N
+
in
0
-
P
I p k +
50% DC
http://onsemi.com
V (Pin1) * 1.4
Q1
R
V
V
in
S
GS
3 R S
Waveforms
+
0
-
13
N S
N p
25% DC
The MCR101 SCR must be selected for a holding of < 0.5 mA @ T
transistor circuit can be used in place of the SCR as shown. All resistors are 10 k.
+
0
-
The totem pole output can furnish negative base current for enhanced
transistor turn-off, with the addition of capacitor C
MCR
101
I
Figure 29. Bipolar Transistor Drive
B
Figure 31. Latched Shutdown
3905
2N
Base Charge
Removal
3903
8(14)
2N
4(7)
2(3)
1(1)
6(10)
5(8)
3(5)
C1
1
.
EA
R
R
+
Q1
A(min)
Osc
R
V
1.0 mA
in
S
Bias
. The simple two
2R
R
5(9)