UC3845BNG ON Semiconductor, UC3845BNG Datasheet - Page 8

IC CTLR CURRENT MODE 8-DIP

UC3845BNG

Manufacturer Part Number
UC3845BNG
Description
IC CTLR CURRENT MODE 8-DIP
Manufacturer
ON Semiconductor
Type
Pulse Width Modulator Controllerr
Datasheets

Specifications of UC3845BNG

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
275kHz
Duty Cycle
50%
Voltage - Supply
8.2 V ~ 25 V
Buck
No
Boost
Yes
Flyback
Yes
Inverting
Yes
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Frequency-max
275kHz
Duty Cycle (max)
48 %
Output Voltage
4.9 V to 5.1 V
Output Current
1000 mA
Mounting Style
Through Hole
Switching Frequency
500 KHz
Operating Supply Voltage
30 V
Maximum Operating Temperature
+ 70 C
Fall Time
50 ns
Minimum Operating Temperature
0 C
Rise Time
50 ns
Synchronous Pin
No
Topology
Boost, Flyback
Current, Input Bias
-2 μA
Current, Output
+12 mA (Sink), -1 mA (Source)
Current, Supply
30 mA
Frequency, Oscillator
250 kHz
Package Type
PDIP-8
Power Dissipation
1.25 W
Regulation, Line
2 mV
Regulation, Load
3 mV
Regulator Type
DC-DC
Temperature, Operating, Range
0 to +70 °C
Time, Fall
50 ns
Time, Rise
50 ns
Voltage, Gain
3 V/V
Voltage, Input
-0.3 to +5.5 V
Voltage, Noise
50 μV
Voltage, Output
5 V
Voltage, Output, High
13.5 V
Voltage, Output, Low
1.6 V
Voltage, Supply
36 V
Voltage, Supply, Rejection Ratio
70 dB
Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Switching Freq
500KHz
Operating Supply Voltage (max)
30V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
UC3845BNGOS

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0
Capacitor C
Latch “Set"
Input
Output/
Compensation
Current Sense
Input
Latch “Reset"
Input
Output
Compensation
Feedback
T
R
C
Voltage
Output/
Pin numbers adjacent to terminals are for the 8-pin dual-in-line package.
Pin numbers in parenthesis are for the D suffix SOIC-14 package.
T
T
Input
8(14)
V
4(7)
2(3)
1(1)
ref
2.5V
Amplifier
Error
Large R
R
R
Oscillator
+ 1.0mA
T
Internal
/Small C
Bias
Figure 16. Representative Block Diagram
T
2R
GND
R
Figure 17. Timing Diagram
5(9)
3.6V
http://onsemi.com
1.0V
Current Sense
Reference
Comparator
Regulator
-
+
8
UVLO
V
ref
R
S
T
UVLO
V
Q
CC
PWM
Latch
V
CC
+
-
7(12)
(See
Text)
36V
= Sink Only Positive True Logic
V
7(11)
Output
6(10)
Power Ground
5(8)
Current Sense Input
3(5)
Small R
C
V
CC
T
/Large C
T
V
in
Q1
R
S

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