IR3832WMTR1PBF International Rectifier, IR3832WMTR1PBF Datasheet - Page 17

IC REG SYNC BUCK 4A DDR 15-QFN

IR3832WMTR1PBF

Manufacturer Part Number
IR3832WMTR1PBF
Description
IC REG SYNC BUCK 4A DDR 15-QFN
Manufacturer
International Rectifier
Series
SupIRBuck™r
Datasheet

Specifications of IR3832WMTR1PBF

Applications
Converter, DDR
Voltage - Input
1.5 ~ 16 V
Number Of Outputs
1
Voltage - Output
0.6 ~ 14.4 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
15-PowerVQFN
Part Status
Preferred
Package
PQFN / 5 x 6
Circuit
Single Output
Iout (a)
4
Switch Freq (khz)
250 - 1500
Input Range (v)
1.5 - 16
Output Range (v)
0.7 - 0.9*Vin
Ocp Otp Uvlo Pre-bias Soft Start And
PGOOD + EN + OVD + DDR Tracking
Server Storage
Yes
Routers Switches
Yes
Base Station Telecom
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3832WMTR1PBFTR
Application Information
Design Example:
The following example is a typical application for
IR3832W. The application circuit is shown on
page 23.
Enabling the IR3832W
As explained earlier, the precise threshold of
the Enable lends itself well to implementation of
a UVLO for the Bus Voltage.
For a typical Enable threshold of V
For a V
a good choice.
Programming the frequency
For F
Table. 1.
Output Voltage Programming
Output voltage is programmed by the tracking
reference voltage at Vp and external voltage
divider. The divider is ratioed such that the
voltage at the Fb pin is equal to the voltage at the
Vp pin pin when the output is at its desired value.
The output voltage is defined by using the
following equation:
Rev 4.0
V
V
R
in
o
s
2
(min)
=
in (min)
= 400 kHz, select R
=
V
V
V
I
F
ΔV
R
o
p
in
o
s
*
1
=
=
=
=
o
R
V
=10.2V, R
4
IR3832W
1
0.75
1
12
400
in(
R
+
A
+
Enable
min
2
R
R
V
R
V
22.5mV
8
9
EN
kHz
2
)
V
(
13.2V
=
V
..........
V
1
EN
=49.9K and R
EN
..........
=
..........
max)
t
1.2
= 35.7 kΩ, using
..........
(6)
EN
..........
V
= 1.2 V
in
2
R
R
=7.50K is
(5)
.....(7)
1
2
When an external resistor divider is connected to
the output as shown in figure 10.
Equation (5) can be rewritten as:
For low voltage applications, such as this
design, it is often advisable to eliminate the bias
resistor R9 from Fb to ground. For the calculated
value of R8 see feedback compensation section.
Further, the tracking reference Vp may be itself
derived from some master reference by means
of a resistive divider as shown in Fig. 9. This is
common in active bus termination circuits such
as Voltage Tracking Termination (VTT) where
the tracking reference Vp may be obtained as
half of the master reference VDDQ which forms
the input to one or more memory banks.
In this design,
VDDQ=1.5V
R
Vp=0.75V
Soft-Start Programming
The soft-start timing can be programmed by
selecting the soft-start capacitance value. From
(1), for a desired start-up time of the converter,
the soft start capacitor can be calculated by
using:
Where T
For tracking applications the output is generally
required to track Vp even at start-up. Hence, it is
necessary to ensure that the SS pin is already
up to 3 V before the tracking reference signal is
applied to the Vp pin. This can be done by
choosing a small value for the soft-start
capacitor to ensure that the voltage at the SS pin
rises to 3 V quickly. A 0.022 uF capacitor is
chosen for this purpose.
Fig. 10. Typical application of the IR3832W for
p1
=R
R
C
9
p2
SS
=
=1.5 kΩ
start
R
(
μF
programming the output voltage
8
is the desired start-up time (ms).
)
=
V
T
V
o
start
p
V
IR3832WMPbF
p
(
..........
ms
)
×
..........
0.02857
..........
PD-97508
..........
....
(8)
(9)
17

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