LT1943EFE#TR Linear Technology, LT1943EFE#TR Datasheet - Page 10

• Manufacturer Part Number: LT1943EFE#TR
• Description: IC REG SW QUAD TFT LCD 28-TSSOP
• Manufacturer: Linear Technology

Specifications of LT1943EFE#TR

• Applications: Converter, TFT, LCD
• Voltage - Input: 4.5 ~ 22 V
• Number Of Outputs: 4
• Voltage - Output: 1.25 ~ 40 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OPERATIO
LT1943
The LT1943 is a highly integrated power supply IC con-
taining four separate switching regulators. All four switch-
ing regulators have their own oscillator with frequency
foldback and use current mode control. Switching regula-
tor 1 consists of a step-down regulator with a switch
current limit of 2.4A. Switching regulator 2 can be config-
ured as a step-up or SEPIC converter and has a 2.6A
switch. Switching regulator 3 consists of a step-up regu-
lator with a 0.35A switch as well as an integrated Schottky
diode. Switching regulator 4 has two feedback pins (FB4
and NFB4) and can directly regulate positive or negative
output voltages. The four regulators share common cir-
cuitry including input source, voltage reference, and mas-
ter oscillator. Operation can be best understood by refer-
ring to the Block Diagram as shown in Figure 1.
If the RUN/SS pin is pulled to ground, the LT1943 is shut
down and draws 35µA from the input source tied to V
internal 1.7µA current source charges the external soft-
start capacitor, generating a voltage ramp at this pin. If the
RUN/SS pin exceeds 0.6V, the internal bias circuits turn
on, including the internal regulator, reference, and 1.1MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
RUN/SS pin reaches 0.8V. Switcher 1 generates V
which must be tied to the BIAS pin. When BIAS reaches
2.8V, the NPN pulling down on the SS-234 pin turns off,
allowing an internal 1.7µA current source to charge the
external capacitor tied to the SS-234 pin. When the voltage
on the SS-234 pin reaches 0.8V, switchers 2, 3 and 4 are
enabled. AV
rate determined by the capacitor tied to the SS-234 pin.
When all the outputs reach 90% of their programmed
voltages, the NPN pulling down on the C
and an internal 20µA current source will charge the exter-
nal capacitor tied to the C
1.1V, the output disconnect PNP turns on, connecting
V
10% of their programmed voltage, PanelProtect circuitry
pulls the C
A power good comparator monitors AV
when the FB2 pin is at or above 90% of its regulated value.
10
ON
. In the event of any of the four outputs dropping below
T
DD
pin to GND, disabling V
and V
U
OFF
will then begin rising at a ramp
T
pin. When the C
ON
.
T
DD
pin will turn off,
T
and turns on
pin reaches
LOGIC
IN
. An
,
The output is an open collector transistor that is off when
the output is out of regulation, allowing an external resis-
tor to pull the pin high. This pin can be used with a
P-channel MOSFET that functions as an output disconnect
for AV
The four switchers are current mode regulators. Instead of
directly modulating the duty cycle of the power switch, the
feedback loop controls the peak current in the switch
during each cycle. Compared to voltage mode control,
current mode control improves loop dynamics and pro-
vides cycle-by-cycle current limit.
500mA/DIV
500mA/DIV
RUN-SS
20V/DIV
20V/DIV
10V/DIV
20V/DIV
50V/DIV
PGOOD
SS-234
2V/DIV
2V/DIV
V
5V/DIV
1A/DIV
2V/DIV
1A/DIV
I
LOGIC
AV
L2+L3
V
V
V
V
OFF
I
I
I
DD
ON
L1
L4
E3
L5
CT
Figure 2. LT1943 Power-Up Sequence. (Traces From
Both Photos are Synchronized to the Same Trigger)
DD
.
5ms/DIV
5ms/DIV
(2a)
(2b)
1943 F03a
1943 F03b
1943fa