S-1701U5041-U5T1G Seiko Instruments, S-1701U5041-U5T1G Datasheet - Page 48
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S-1701U5041-U5T1G
Manufacturer Part Number
S-1701U5041-U5T1G
Description
IC DETECT/REG 400MA 5.0V SOT89-5
Manufacturer
Seiko Instruments
Datasheet
1.S-1701A1815-M5T1G.pdf
(71 pages)
Specifications of S-1701U5041-U5T1G
Applications
Converter, Battery Powered Devices
Voltage - Input
2 ~ 6.5 V
Number Of Outputs
1
Voltage - Output
5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-89-5
Polarity
Positive
Input Voltage Max
6.5 V
Output Voltage
5 V
Output Type
Fixed
Dropout Voltage (max)
0.21 V at 100 mA
Output Current
400 mA
Line Regulation
0.2 % / V
Load Regulation
40 mV
Voltage Regulation Accuracy
1 %
Maximum Power Dissipation
1 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
48
HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION
S-1701 Series
If the desired detection voltage range is other than those provided by the S-1701 Series, the detection voltage can be
changed by using a divided resistor or diode in the SENSE pin products (N/P/Q/R/S/T types) as shown in Figures 38 and
39.
In the case shown in Figure 38, the hysteresis width also changes at the same time.
1. Changing detection voltage using divided resistors
2. Changing detection voltage using diode
Application Circuit
Caution If R
Caution The above connection diagrams (Figures 38 and 39) and constants will not guarantee successful
through current of the IC.
operation. Perform thorough evaluation using the actual application to set the constants.
a
and R
b
are larger, the hysteresis may be greater than the result of the above formula due to the
(R
VDD
VSS
VDD
VSS
a
Detection voltage =
Hysteresis width =
*1. Set Ra to 75 kΩ or lower to prevent oscillation.
≤ 75 kΩ)
V
V
R
R
f1
f2
Detection voltage = V
a
b
*1
Seiko Instruments Inc.
SENSE
SENSE
R
Figure 38
Figure 39
R
a
R
+R
S-1701 Series
N to T types
a
R
+R
b
S-1701 Series
N to T types
b
b
b
• V
f1
• −V
+ V
HYS
DET
f2
+ (−V
DET
)
VDD
VDOUT
VDD
VDOUT
Rev.3.0
_00