MAX17510ATB+T Maxim Integrated Products, MAX17510ATB+T Datasheet - Page 11

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MAX17510ATB+T

Manufacturer Part Number
MAX17510ATB+T
Description
IC REG DDR LOW VOLTAGE 10-TDFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX17510ATB+T

Applications
Converter, DDR
Voltage - Input
1.1 ~ 3.6 V
Number Of Outputs
1
Voltage - Output
0.5 ~ 1.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-TDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For a step voltage change at REFIN, the rate of change
of the output voltage is limited by the total output
capacitance, the current limit, and the load during the
transition. Adding a capacitor across REFIN and AGND
filters noise and controls the rate of change of the
REFIN voltage during dynamic transitions. With the
additional capacitance, the REFIN voltage slews
between the two set points with a time constant given
by R
resistance seen by the slew capacitor.
The maximum power dissipation of the MAX1510/
MAX17510 depends on the thermal resistance of the 10-
pin TDFN package and the circuit board, the tempera-
ture difference between the die and ambient air, and the
rate of airflow. The power dissipated in the device is:
The resulting maximum power dissipation is:
where T
(+150°C), T
mal resistance from the die junction to the package case,
and θ
the PCB, copper traces, and other materials to the sur-
rounding air. For optimum power dissipation, use a large
ground plane with good thermal contact to the backside
pad, and use wide input and output traces.
When 1 square inch of copper is connected to the
device, the maximum allowable power dissipation of a
10-pin DFN package is 1951mW. The maximum power
dissipation is derated by 24.4mW/°C above T
Extra copper on the PCB increases thermal mass and
reduces thermal resistance of the board. Refer to the
MAX1510 evaluation kit for a layout example.
The MAX1510/MAX17510 deliver up to 3A and oper-
ates with input voltages up to 3.6V, but not simultane-
ously. High output currents can only be achieved when
the input-output differential voltages are low (Figure 5).
A regulator’s minimum input-to-output voltage differen-
tial (dropout voltage) determines the lowest usable sup-
ply voltage. Because the MAX1510/MAX17510 use an
n-channel pass transistor, the dropout voltage is a func-
tion of the drain-to-source on-resistance (R
0.25Ω max) multiplied by the load current (see the
Typical Operating Characteristics ):
Operating Region and Power Dissipation
EQ
CA
x C
J(MAX)
is the thermal resistance from the case through
A
REFIN
is the ambient temperature, θ
P
P
DIS MAX
SRC
is the maximum junction temperature
P
, where R
(
______________________________________________________________________________________
SINK
= I
)
SRC
= I
=
SINK
EQ
x (V
T
θ
J MAX
Low-Voltage DDR Linear Regulators
(
JC
is the equivalent parallel
IN
x V
Dropout Operation
+
– V
)
OUT
θ
-
OUT
CA
T
A
)
JC
A
is the ther-
DS(ON)
= +70°C.
=
For low output-voltage applications, the sink current is
limited by the output voltage and the R
MOSFET.
Bypass IN to PGND with a 10µF or greater ceramic
capacitor. Bypass V
capacitor for normal operation in most applications.
Typically, the LDO is powered from the output of a
step-down controller (memory supply) that has addi-
tional bulk capacitance (polymer or tantalum) and dis-
tributed ceramic capacitors.
The MAX1510/MAX17510 output stability is indepen-
dent of the output capacitance for C
220µF. Capacitor ESR between 2mΩ and 50mΩ is
needed to maintain stability. Within the recommended
capacitance and ESR limits, the output capacitor
should be chosen to provide good transient response:
where ΔI
current step (typically equal to the maximum source
load plus the maximum sink load), and ΔV
the allowable peak-to-peak voltage tolerance.
Using larger output capacitance can improve efficiency
in applications where the source and sink currents
change rapidly. The capacitor acts as a reservoir for
the rapid source and sink currents, so no extra current
is supplied by the MAX1510/MAX17510 or discharged
to ground, improving efficiency.
Figure 5. Power Operating Region—Maximum Output Current
vs. Input-Output Differential Voltage
3.5
3.0
2.5
2.0
1.5
1.0
0.5
OUT(P-P)
0
0
ΔI
DROPOUT VOLTAGE
LIMITED
INPUT-OUTPUT DIFFERENTIAL VOLTAGE (V)
V
OUT(P-P)
DROPOUT
0.5
SAFE OPERATING REGION
T
A
is the maximum peak-to-peak load-
= +100 ° C
1.0
Output Capacitor Selection
T
CC
A
Input Capacitor Selection
= 0 ° C TO +70 ° C
1.5
x ESR = ΔV
MAXIMUM CURRENT LIMIT
= R
to AGND with a 1µF ceramic
2.0
V
DS(ON)
IN(MAX)
2.5
- V
OUT(P-P)
OUT(MIN)
3.0
x I
OUT
OUT
3.5
1s RMS
LIMIT
100s RMS
LIMIT
DS(ON)
from 10µF to
OUT(P-P)
of the
11
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