LT3695EMSE#PBF Linear Technology, LT3695EMSE#PBF Datasheet - Page 18

IC SWIT REG BUCK 1A ADJ 16MSOP

LT3695EMSE#PBF

Manufacturer Part Number
LT3695EMSE#PBF
Description
IC SWIT REG BUCK 1A ADJ 16MSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LT3695EMSE#PBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 20 V
Current - Output
1A
Frequency - Switching
250kHz ~ 2.2MHz
Voltage - Input
3.6 ~ 36 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-MSOP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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APPLICATIONS INFORMATION
LT3695 Series
Low Ripple Burst Mode Operation
The LT3695 regulators are capable of operating in either
low ripple Burst Mode operation or pulse-skipping mode
which are selected using the SYNC pin. See the Synchro-
nization section for more information.
To enhance effi ciency at light loads, the LT3695 regulators
can be operated in low ripple Burst Mode operation which
keeps the output capacitor charged to the proper voltage
while minimizing the input quiescent current. During Burst
Mode operation, the LT3695 regulators deliver single
cycle bursts of current to the output capacitor followed by
sleep periods where the output power is delivered to the
load by the output capacitor. Because the LT3695 regula-
tors deliver power to the output with single, low current
pulses, the output ripple is kept below 15mV for a typical
application. In addition, V
(LT3695-3.3, LT3695-5) quiescent currents are reduced
to typically 35μA, 55μA and 65μA, respectively, during
the sleep time. As the load current decreases towards a
no-load condition, the percentage of time that the LT3695
regulators operate in sleep mode increases and the average
input current is greatly reduced resulting in high effi ciency
even at very low loads (see Figure 3). At higher output
loads (above about 70mA for the front page application)
the LT3695 regulators will be running at the frequency
programmed by the R
standard PWM mode. The transition between PWM and
low ripple Burst Mode operation is seamless, and will not
disturb the output voltage.
If low quiescent current is not required, tie SYNC high to
select pulse-skipping mode. The benefi t of this mode is
that the LT3695 regulators will enter full frequency standard
18
Figure 3. Switching Waveforms, Burst Mode Operation
20mV/DIV
0.2A/DIV
5V/DIV
V
V
OUT
SW
I
L
V
I
LOAD
IN
= 12V, FRONT PAGE APPLICATION
= 5mA
T
resistor, and will be operating in
IN
and BD (LT3695), and OUT1,2
5μs/DIV
3695 F03
PWM operation at a lower output load current than when
in Burst Mode operation. With the SYNC pin tied low, the
front page application circuit will switch at full frequency
at output loads higher than about 100mA. With the SYNC
pin tied high, the front page application circuit will switch
at full frequency at output loads higher than about 30mA.
The maximum load current that the LT3695 regulators can
supply is reduced when SYNC is high.
BOOST Pin Considerations
Capacitor C3 and the internal boost Schottky diode (see the
Block Diagram) are used to generate a boost voltage that
is higher than the input voltage. In most cases a 0.22μF
capacitor will work well. Figure 4 shows three ways to
arrange the boost circuit for the LT3695 regulators. The
BOOST pin must be more than 2.3V above the SW pin
for best effi ciency. For outputs of between 3V and 8V, the
standard circuit (Figure 4a) is best. For outputs between
2.8V and 3V, use a 1μF boost capacitor. A 2.5V output
presents a special case because it is marginally adequate
to support the boosted drive stage while using the internal
boost diode. For reliable BOOST pin operation with 2.5V
outputs use a good external Schottky diode (such as the
ON Semi MBR0540), and a 1μF boost capacitor (see Figure
4b). For lower output voltages the boost diode can be tied
to the input (Figure 4c), or to another supply greater than
2.8V. Keep in mind that a minimum input voltage of 4.3V
is required if the voltage at the BD pin is smaller than 3V.
Tying BD to V
25V. The circuit in Figure 4a is more effi cient because the
BOOST pin current and BD pin quiescent current come
from a lower voltage source. You must also be sure that
the maximum voltage ratings of the BOOST and BD pins
are not exceeded.
As mentioned, a minimum of 2.5V across the BOOST
capacitor is required for proper operation of the internal
BOOST circuitry to provide the base current for the power
NPN switch. For BD pin voltages higher than 3V, the excess
voltage across the BOOST capacitor does not bring an
increase in performance but dissipates additional power in
the internal BOOST circuitry instead. The BOOST circuitry
tolerates reasonable amounts of power, however excessive
power dissipation on this circuitry may impair reliability. For
reliable operation, use no more than 8V on the BD pin for
IN
reduces the maximum input voltage to
3695fa

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