LT1913EDD#PBF Linear Technology, LT1913EDD#PBF Datasheet - Page 7

• Manufacturer Part Number: LT1913EDD#PBF
• Description: IC REG STEP DOWN 3.5A 10-DFN
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT1913EDD#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 0.79 ~ 25 V
• Current - Output: 3.5A
• Frequency - Switching: 200kHz ~ 2.4MHz
• Voltage - Input: 3.6 ~ 25 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-DFN
• Primary Input Voltage: 25V
• No. Of Outputs: 1
• Output Voltage: 25V
• Output Current: 3.5A
• No. Of Pins: 10
• Operating Temperature Range: -40°C To +125°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

PI FU CTIO S
BD (Pin 1): This pin connects to the anode of the boost
Schottky diode. BD also supplies current to the internal
regulator.
BOOST (Pin 2): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 3): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
V
internal regulator and to the internal power switch. This
pin must be locally bypassed.
RUN/SS (Pin 5): The RUN/SS pin is used to put the
LT1913 in shutdown mode. Tie to ground to shut down
the LT1913. Tie to 2.5V or more for normal operation. If
the shutdown feature is not used, tie this pin to the V
pin. RUN/SS also provides a soft-start function; see the
Applications Information section.
IN
U
(Pin 4): The V
U
IN
pin supplies current to the LT1913’s
U
IN
SYNC (Pin 6): This is the external clock synchronization
input. Ground this pin when not used. Tie to a clock source
for synchronization. Clock edges should have rise and
fall times faster than 1μs. Do not leave pin fl oating. See
synchronizing section in Applications Information.
PG (Pin 7): The PG pin is the open collector output of an
internal comparator. PG remains low until the FB pin is
within 9% of the fi nal regulation voltage. PG output is valid
when V
FB (Pin 8): The LT1913 regulates the FB pin to 0.790V.
Connect the feedback resistor divider tap to this pin.
V
amplifi er. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
RT (Pin 10): Oscillator Resistor Input. Connecting a resistor
to ground from this pin sets the switching frequency.
Exposed Pad (Pin 11): Ground. The Exposed Pad must
be soldered to PCB.
C
(Pin 9): The V
IN
is above 3.6V and RUN/SS is high.
C
pin is the output of the internal error
LT1913
7
1913f