IR3841WMTR1PBF International Rectifier, IR3841WMTR1PBF Datasheet - Page 15
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IR3841WMTR1PBF
Manufacturer Part Number
IR3841WMTR1PBF
Description
IC REG SYNC BUCK 8A 15-QFN
Manufacturer
International Rectifier
Series
SupIRBuck™r
Type
Step-Down (Buck)r
Datasheet
1.IR3841WMTR1PBF.pdf
(34 pages)
Specifications of IR3841WMTR1PBF
Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.7 ~ 14.4 V
Current - Output
8A
Frequency - Switching
225kHz ~ 1.65MHz
Voltage - Input
1.5 ~ 16 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
15-PowerVQFN
Power - Output
1.5W
Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
14.4V
Output Current
8A
No. Of Pins
15
Operating Temperature Range
-40°C To +125°C
Output Voltage Adjustable Max, Vout
14.4V
Rohs Compliant
Yes
Part Status
Preferred
Package
PQFN / 5 x 6
Circuit
Single Output
Iout (a)
8
Switch Freq (khz)
250 - 1500
Input Range (v)
1.5 - 16
Output Range (v)
0.7 - 0.9*Vin
Ocp Otp Uvlo Pre-bias Soft Start And
PGOOD + EN + SEQ + OVD
Design Tool
Yes
Server Storage
Yes
Routers Switches
Yes
Base Station Telecom
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
IR3841WMTR1PBFTR
Thermal Shutdown
Temperature
IR3841W. The trip threshold is typically set to
140
shutdown
discharges the soft start capacitor.
Automatic restart is initiated when the sensed
temperature drops within the operating range.
There is a 20
shutdown threshold.
Output Voltage Sequencing
The
programmable sequencing options using Seq,
Enable and Power Good pins.
Fig. 8a. Simultaneous Power-up of the slave
Rev 5.0
Through these pins, voltage sequencing such as
simultaneous
implemented. Figure 8. shows simultaneous
sequencing
power-up, the voltage at the Seq pin of the slave
reaches 0.7V before the Fb pin of the master. For
R
the slave follows that of the master until the
voltage at the Seq pin of the slave reaches 0.7 V.
After the voltage at the Seq pin of the slave
exceeds 0.85V, the internal 0.7V reference of
the slave dictates its output voltage.
o
E
C. When trip threshold is exceeded, thermal
/R
F
IR3841W
with respect to the master.
=R
turns
C
/R
Simultaneous Powerup
D
sensing
configurations.
o
, therefore, the output voltage of
C hysteresis in the thermal
and
off
can
both
is
accommodate
sequential
Vo1
Vo2
provided
MOSFETs
In
simultaneous
can
inside
user
and
be
RE
RF
Vo(master)
1.5V <Vin<16V
4.5V <Vcc<5.5V
Fig. 8b. Application Circuit for Simultaneous
Power Good Output
The IC continually monitors the output voltage via
Feedback (Fb pin). The feedback voltage forms
an input to a window comparator whose upper
and lower thresholds are 0.805V and 0.595V
respectively. Hence, the Power Good signal is
flagged when the Fb pin voltage is within the
PGood window, i. e. between 0.595V to 0.805V,
as shown in Fig .9. The PGood pin is open drain
and it needs to be externally pulled high. High
state indicates that output is in regulation. Fig. 9a
shows the PGood timing diagram for non-
tracking operation. In this case, during startup,
PGood goes high after the SS voltage reaches
2.1V if the Fb voltage is within the PGood
comparator window. Fig. 9a. and Fig 9.b. also
show a 256 cycle delay between the Fb voltage
entering within the thresholds defined by the
PGood window and PGood going high.
PGood
Sequencing
Seq
Vcc
Rt
SS/ SD
PGood
Enable
Gnd
IR3841WMPbF
Vin
PGnd
OCSet
Comp
Boot
SW
Fb
RC
RD
15
Vo(slave)