LTC3406BES5-1.8#TRMPBF Linear Technology, LTC3406BES5-1.8#TRMPBF Datasheet - Page 12
LTC3406BES5-1.8#TRMPBF
Manufacturer Part Number
LTC3406BES5-1.8#TRMPBF
Description
IC REG ST-DWN SYNC 1.8V TSOT23-5
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LTC3406BES5TRMPBF.pdf
(16 pages)
Specifications of LTC3406BES5-1.8#TRMPBF
Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
1.8V
Current - Output
600mA
Frequency - Switching
1.5MHz
Voltage - Input
2.5 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-5, TSOT-5, TSOP-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Other names
LTC3406BES5-1.8#TRMPBFTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIO S I FOR ATIO
LTC3406B
12
Design Example
As a design example, assume the LTC3406B is used in a
single lithium-ion battery-powered cellular phone
application. The V
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
V
OUT
L
=
( )
f
V
L1
( )
OUT
BOLD LINES INDICATE HIGH CURRENT PATHS
1
Figure 6a. LTC3406B Suggested Layout
∆
Figure 5a. LTC3406B Layout Diagram
–
+
I
L
SW
PIN 1
V
C
OUT
OUT
IN
L1
C
U
OUT
will be operating from a maximum of
⎛
⎜
⎝
1
1
2
3
LTC3406B
−
RUN
SW
GND
VIA TO V
U
GND
V
LTC3406B
V
OUT
IN
IN
V
V
C
⎞
⎟
⎠
FB
IN
IN
C
IN
5
4
W
C
R1
R2
FWD
R2
VIA TO GND
3406B F05a
C
U
FWD
R1
V
V
+
–
3406B F06a
IN
IN
(3)
VIA TO V
Substituting V
f = 1.5MHz in equation (3) gives:
A 2.2µH inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2Ω series resistance.
C
I
of less than 0.25Ω. In most cases, a ceramic capacitor will
satisfy this requirement.
LOAD(MAX)
IN
OUT
L
will require an RMS current rating of at least 0.3A ≅
=
V
OUT
1 5
.
Figure 6b. LTC3406B-1.8 Suggested Layout
Figure 5b. LTC3406B-1.8 Layout Diagram
MHz
/2 at temperature and C
V
OUT
2 5
OUT
L1
.
–
+
(
240
V
BOLD LINES INDICATE HIGH CURRENT PATHS
= 2.5V, V
C
mA
OUT
SW
L1
PIN 1
C
)
OUT
⎛
⎜
⎝
1
2
3
1
−
LTC3406B-1.8
RUN
SW
LTC3406B-1.8
IN
GND
2 5
4 2
VIA TO V
GND
= 4.2V, ∆I
.
.
V
V
V
OUT
V
C
OUT
IN
IN
⎞
⎟ =
⎠
IN
VIA TO V
5
4
will require an ESR
2 81
C
IN
.
L
OUT
3406B F05b
= 240mA and
µ
H
V
IN
V
3406B F06b
IN
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