LTC1622IS8#TR Linear Technology, LTC1622IS8#TR Datasheet - Page 8

IC CTRLR DC/DC STEP DOWN 8SOIC

LTC1622IS8#TR

Manufacturer Part Number
LTC1622IS8#TR
Description
IC CTRLR DC/DC STEP DOWN 8SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC1622IS8#TR

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 9.8 V
Current - Output
1A
Frequency - Switching
110kHz ~ 550kHz
Voltage - Input
2 ~ 10 V
Operating Temperature
-45°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

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LTC1622
APPLICATIONS
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing saturation.
Ferrite core materials saturate “hard,” which means that
the inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently, output voltage
ripple. Do not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mu. Toroids are very space efficient,
especially when you can use several layers of wire.
Because they generally lack a bobbin, mounting is more
difficult. However, new surface mountable designs that do
not increase the height significantly are available.
Power MOSFET Selection
An external P-channel power MOSFET must be selected
for use with the LTC1622. The main selection criteria for
the power MOSFET are the threshold voltage V
the “on” resistance R
C
Since the LTC1622 is designed for operation down to low
input voltages, a sublogic level threshold MOSFET (R
guaranteed at V
work close to this voltage. When these MOSFETs are used,
make sure that the input supply to the LTC1622 is less than
the absolute maximum MOSFET V
The gate drive voltage levels are from ground to V
The required minimum R
erned by its allowable power dissipation. For applications
that may operate the LTC1622 in dropout, i.e., 100% duty
cycle, at its worst case the required R
where P
temperature dependency of R
given for a MOSFET in the form of a normalized R
temperature curve, but p = 0.005/ C can be used as an
approximation for low voltage MOSFETs.
8
RSS
R
DS ON
and total gate charge.
P
is the allowable power dissipation and p is the
DC 100
GS
= 2.5V) is required for applications that
U
DS(ON)
I
OUT MAX
INFORMATION
DS(ON)
U
,reverse transfer capacitance
DS(ON)
P
P
of the MOSFET is gov-
2
GS
W
1
. (1 + p) is generally
rating, typically 8V.
DS(ON)
p
is given by:
GS(TH)
U
DS(ON)
IN
DS(ON)
.
and
vs
In applications where the maximum duty cycle is less than
100% and the LTC1622 is in continuous mode, the R
is governed by:
where DC is the maximum operating duty cycle of the
LTC1622.
When the LTC1622 is operating in continuous mode, the
MOSFET power dissipation is:
where K is a constant inversely related to gate drive
current. Because of the high switching frequency, the
second term relating to switching loss is important not to
overlook. The constant K = 3 can be used to estimate the
contributions of the two terms in the MOSFET dissipation
equation.
Output Diode Selection
The catch diode carries load current during the off-time.
The average diode current is therefore dependent on the
P-channel switch duty cycle. At high input voltages the
diode conducts most of the time. As V
the diode conducts only a small fraction of the time. The
most stressful condition for the diode is when the output
is short circuited. Under this condition the diode must
safely handle I
it is important to adequately specify the diode peak current
and average power dissipation so as not to exceed the
diode ratings.
Under normal load conditions, the average current con-
ducted by the diode is:
I
R
P
D
MOSFET
DS ON
V
IN
V
IN
PEAK
K V
DC I
V
V
V
OUT
OUT
V
IN
D
IN
at close to 100% duty cycle. Therefore,
OUT
2
I
P
V
OUT
V
P
D
I
2
OUT
D
1
I
OUT
C
p
RSS
2
1
f
IN
p R
approaches V
DS ON
(
)
DS(ON)
OUT

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