LTC1530CS8-2.5#TR Linear Technology, LTC1530CS8-2.5#TR Datasheet - Page 8
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LTC1530CS8-2.5#TR
Manufacturer Part Number
LTC1530CS8-2.5#TR
Description
IC SW REG CTRLR SYNC HIPWR 8SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LTC1530CS8PBF.pdf
(24 pages)
Specifications of LTC1530CS8-2.5#TR
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
2.5V
Current - Output
20A
Frequency - Switching
300kHz
Voltage - Input
3.3V, 5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Available stocks
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Manufacturer
Quantity
Price
APPLICATIO S I FOR ATIO
LTC1530
OVERVIEW
The LTC1530 is a voltage feedback, synchronous switch-
ing regulator controller (see Block Diagram) designed for
use in high power, low voltage step-down (buck) convert-
ers. It includes an on-chip soft-start capacitor, a PWM
generator, a precision reference trimmed to 1%, two high
power MOSFET gate drivers and all the necessary feed-
back and control circuitry to form a complete switching
regulator circuit running at 300kHz.
The LTC1530 includes a current limit sensing circuit that
uses the topside external N-channel power MOSFET as a
current sensing element, eliminating the need for an
external sense resistor. If the current comparator, CC,
detects an overcurrent condition, the duty cycle is reduced
by discharging the internal soft-start capacitor through a
voltage-controlled current source. Under severe over-
loads or output short-circuit conditions, the soft-start
capacitor is pulled to ground and a start-up cycle is
initiated. If the short circuit or overload persists, the chip
repeats soft-start cycles and prevents damage to external
components.
THEORY OF OPERATION
Primary Feedback Loop
The LTC1530 compares the output voltage with the inter-
nal reference at the error amplifier inputs. The error
amplifier outputs an error signal to the PWM comparator.
This signal is compared to the fixed frequency oscillator
8
TEST CIRCUITS
COMP
COMP
I
FB
V
OUT
LTC1530
PV
PV
12V
CC
CC
GND
G2
G1
U
U
0.1 F
3300pF
3300pF
+
W
10 F
G1 RISE/FALL
G2 RISE/FALL
1530 F04a
U
Figure 4
50%
t
r
10%
50%
90%
t
NOL
sawtooth waveform to generate the PWM signal. The
PWM signal drives the external MOSFETs at the G1 and G2
pins. The resulting chopped waveform is filtered by L
C
tion is typically accomplished with an external RC + C
network at the COMP pin, which is the output node of the
transconductance error amplifier.
MIN, MAX Feedback Loops
Two additional comparators in the feedback loop provide
high speed fault correction in situations where the error
amplifier cannot respond quickly enough. MIN compares
the feedback signal to a voltage 3% below the internal
reference. If the signal is below the comparator threshold,
the MIN comparator overrides the error amplifier and
forces the loop to maximum duty cycle, typically 86%.
Similarly, the MAX comparator forces the output to 0%
duty cycle if the feedback signal is greater than 3% above
the internal reference. To prevent these two comparators
from triggering due to noise, the MIN and MAX compara-
tors’ response times are deliberately delayed by two to
three microseconds. These comparators help prevent
extreme output perturbations with fast output load current
transients, while allowing the main feedback loop to be
optimally compensated for stability.
Thermal Shutdown
The LTC1530 has a thermal protection circuit that disables
both internal gate drivers if activated. G1 and G2 are held
low and the LTC1530 supply current drops to about 1mA.
OUT
t
90%
NOL
50%
which closes the loop. Loop frequency compensa-
10%
50%
t
f
COMP
G1
t
SS
1530 F04b
O
1530fa
and