LTC1735CS#TRPBF Linear Technology, LTC1735CS#TRPBF Datasheet - Page 13
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LTC1735CS#TRPBF
Manufacturer Part Number
LTC1735CS#TRPBF
Description
IC SW REG STEP-DOWN SYNC 16-SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LTC1735CSPBF.pdf
(32 pages)
Specifications of LTC1735CS#TRPBF
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 6 V
Current - Output
3A
Frequency - Switching
300kHz
Voltage - Input
4 ~ 30 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
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Part Number
Manufacturer
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Price
APPLICATIO S I FOR ATIO
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive than
ferrite. A reasonable compromise from the same manu-
facturer is Kool M . Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designs for surface mount are available
that do not increase the height significantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for use
with the LTC1735: An N-channel MOSFET for the top
(main) switch and an N-channel MOSFET for the bottom
(synchronous) switch.
The peak-to-peak gate drive levels are set by the INTV
voltage. This voltage is typically 5.2V during start-up (see
EXTV
old MOSFETs must be used in most LTC1735 applica-
tions. The only exception is when low input voltage is
expected (V
MOSFETs (V
attention to the BV
well; many of the logic level MOSFETs are limited to 30V
or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
input voltage and maximum output current. When the
LTC1735 is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle
Synchronous Switch Duty Cycle
CC
pin connection). Consequently, logic-level thresh-
IN
DS(ON)
GS(TH)
< 5V); then, sub-logic level threshold
DSS
, reverse transfer capacitance C
U
< 3V) should be used. Pay close
specification for the MOSFETs as
U
V
V
OUT
IN
W
V
IN
–
V
IN
V
OUT
U
RSS
CC
,
The MOSFET power dissipations at maximum output
current are given by:
where is the temperature dependency of R
is a constant inversely related to the gate drive current.
Both MOSFETs have I
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
V
with larger MOSFETs, while for V
losses rapidly increase to the point that the use of a higher
R
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short-circuit when the
duty cycle in this switch is nearly 100%.
The term (1 + ) is generally given for a MOSFET in the
form of a normalized R
voltage MOSFETs. C
MOSFET characteristics. The constant k = 1.7 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
The Schottky diode D1 shown in Figure 1 conducts during the
dead-time between the conduction of the two power MOSFETs.
This prevents the body diode of the bottom MOSFET from
turning on and storing charge during the dead-time, which
could cost as much as 1% in efficiency. A 3A Schottky is
generally a good size for 10A to 12A regulators due to the
relatively small average current. Larger diodes can result in
additional transition losses due to their larger junction capaci-
tance. The diode may be omitted if the efficiency loss can be
tolerated.
IN
DS(ON)
= 0.005/ C can be used as an approximation for low
P
P
< 20V the high current efficiency generally improves
MAIN
SYNC
device with lower C
k V
V
V
V
OUT
IN
IN
IN
–
V
2
IN
V
I
I
MAX
MAX
OUT
RSS
DS(ON)
2
I
2
MAX
C
R losses while the topside
1
RSS
is usually specified in the
RSS
vs Temperature curve, but
2
actually provides higher
R
f
1
IN
DS ON
> 20V the transition
(
R
LTC1735
)
DS ON
(
DS(ON)
)
13
and k
1735fc