LTC3407EDD-3#PBF Linear Technology, LTC3407EDD-3#PBF Datasheet - Page 3

• Manufacturer Part Number: LTC3407EDD-3#PBF
• Description: IC REG DC/DC DUAL STEPDOWN 10DFN
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3407EDD-3#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.6 ~ 5 V
• Current - Output: 1A
• Frequency - Switching: 1.5MHz
• Voltage - Input: 2.5 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifi cations are at T
SYMBOL
I
R
I
POR
V
I
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. No pin shall exceed 6V.
Note 2: The LTC3407E-3 is guaranteed to meet specifi ed performance
from 0°C to 85°C. Specifi cations over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
TYPICAL PERFORMANCE CHARACTERISTICS
LIM
SW(LKG)
RUN
200mA/DIV
RUN
MODE
DS(ON)
20mV/DIV
5V/DIV
V
OUT
SW
I
L
Burst Mode Operation
V
V
I
LOAD
IN
OUT
PARAMETER
Peak Switch Current Limit, Channel 1 +
Channel 2
Top Switch On-Resistance
Bottom Switch On-Resistance
Switch Leakage Current
Power-On Reset Threshold
Power-On Reset On-Resistance
Power-On Reset Delay
RUN Threshold
RUN Leakage Current
MODE Threshold Low
MODE Threshold High
= 3.6V
= 1.8V
= 100mA
2μs/DIV
34073 G01
200mA/DIV
20mV/DIV
5V/DIV
V
CONDITIONS
V
Duty Cycle <35%
(Note 6)
(Note 6)
V
V
OUT
SW
A
IN
IN
OUT
I
L
= 25°C. V
= 3V, V
= 5V, V
Pulse-Skipping Mode
V
V
I
LOAD
IN
OUT
Ramping Down, MODE/SYNC = 0V
= 3.6V
The
= 1.8V
= 20mA
OUT1
RUN
l
IN
= 0V, V
denotes the specifi cations which apply over the full operating
= 1.5V, V
= 3.6V, unless otherwise specifi ed. (Note 2)
1μs/DIV
Note 3: The LTC3407-3 is tested in a proprietary test mode that connects
the output of the error amplifi er to an outside servo loop.
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T
according to the following formula: T
Note 6: The DFN switch on-resistance is guaranteed by correlation to
wafer level measurements.
OUT1
OUT2
= V
= 2.8V,
J
OUT2
is calculated from the ambient T
= 0V
T
34073 G02
A
= 25°C unless otherwise specifi ed.
200mV/DIV
500mA/DIV
500mA/DIV
I
●
●
V
LOAD
OUT
I
L
V
V
V
I
CIRCUIT OF FIGURE 1
Load Step
LOAD
IN
IN
OUT
J
MIN
0.95
0.3
= T
= 3.6V
0
– 0.5
= 1.8V
= 80mA TO 800mA
A
A
+ (P
and power dissipation P
262,144
LTC3407-3
D
0.35
0.30
0.01
–8.5
0.01
TYP
100
1.2
• θ
1
JA
20μs/DIV
).
MAX
0.45
0.45
200
1.6
1.5
0.5
V
1
1
IN
UNITS
Cycles
34073fb
D
34073 G03
3
μA
μA
%
Ω
Ω
Ω
A
V
V
V