LTC1516IS8 Linear Technology, LTC1516IS8 Datasheet - Page 6

IC SW CAP/DBLR 5V 50MA 8SOIC

LTC1516IS8

Manufacturer Part Number
LTC1516IS8
Description
IC SW CAP/DBLR 5V 50MA 8SOIC
Manufacturer
Linear Technology
Type
Switched Capacitor (Charge Pump), Doublerr
Datasheet

Specifications of LTC1516IS8

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
5V
Current - Output
50mA
Frequency - Switching
600kHz
Voltage - Input
2 ~ 5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1516IS8
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1516IS8
Manufacturer:
LT/凌特
Quantity:
20 000
APPLICATIONS
LTC1516
Ultralow Quiescent Current (I
Supply
The LTC1516 contains an internal resistor divider (refer to
Block Diagram) which draws only 1.5 A (typ) from V
During no-load conditions, the internal load causes a
droop rate of only 150mV per second on V
C
cycle signal to the SHDN pin ensures that the circuit of
Figure 3 comes out of shutdown frequently enough to
maintain regulation during no-load or low-load condi-
tions. Since the part spends nearly all of its time in
shutdown, the no-load quiescent current (see Figure 4a) is
approximately equal to (V
6
OUT
Figure 4a. No Load I
V
IN
= 2V TO 5V
= 10 F. Applying a 5Hz to 100Hz, 95% to 98% duty
6.0
4.0
2.0
0.0
V
+
2.0
OUT
= 5V 4%
10 F
U
+
CC
INPUT VOLTAGE (V)
vs Input Voltage for Circuit in Figure 3
3.0
10 F
INFORMATION
U
OUT
1
2
3
4
)(1.5 A)/(V
C1
V
V
C2
Q
IN
OUT
+
+
Figure 3. Ultralow Quiescent Current (<5 A) Regulated Supply
4.0
< 5 A) Regulated
LTC1516
0.22 F
0.22 F
W
SHDN
1516 • F04a
GND
C2
C1
IN
5.0
)(Efficiency).
8
7
6
5
U
OUT
FROM MPU
with
OUT
.
SHDN PIN WAVEFORMS:
LOW I
I
OUT
The LTC1516 must be out of shutdown for a minimum
duration of 200 s to allow enough time to sense the output
and keep it in regulation. As the V
increases, the frequency with which the part is taken out
of shutdown must also be increased to prevent V
from drooping below 4.8V during the OFF phase (see
Figure 4b). A 100Hz 98% duty cycle signal on the SHDN
pin ensures proper regulation with load currents as high
as 100 A. When load current greater than 100 A is
needed, the SHDN pin must be forced low as in normal
operation. The typical no-load supply current for this
circuit with V
Figure 4b. Maximum SHDN OFF Time vs Output Load Current for
Ultralow I
Q
100 A
MODE (5Hz TO 100Hz, 95% TO 98% DUTY CYCLE)
Q
1000
Operation
100
10
1
1
IN
SHDN ON PULSE WIDTH = 200 s
C
OUT
= 3V is only 3.2 A.
= 10 F
OUTPUT CURRENT ( A)
10
100
V
(I
OUT
OUT
OUT
LOAD ENABLE MODE
1516 • F04b
= 100 A TO 50mA)
1000
load current
1516 • F03
OUT

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