LT1424IS8-9 Linear Technology, LT1424IS8-9 Datasheet - Page 10

• Manufacturer Part Number: LT1424IS8-9
• Description: IC SW REG ISOLATD FLYBCK 9V8SOIC
• Manufacturer: Linear Technology
• Type: Flybackr

Specifications of LT1424IS8-9

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 9V
• Current - Output: 200mA
• Frequency - Switching: 285kHz
• Voltage - Input: 2.8 ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

LT1424-9
OPERATION
time. Certain parameters of flyback amp behavior will then
be directly affected by the variable enable period. These
include effective transconductance and V
LOAD COMPENSATION THEORY
The LT1424-9 uses the flyback pulse to obtain information
about the isolated output voltage. A potential error source
is caused by transformer secondary current flow through
the real life nonzero impedances of the output rectifier,
transformer secondary and output capacitor. This has
been represented previously by the expression (I
However, it is generally more useful to convert this expres-
sion to an effective output impedance. Because the sec-
ondary current only flows during the off portion of the duty
cycle, the effective output impedance equals the lumped
secondary impedance times the inverse of the OFF duty
cycle. That is,
Expressing this in terms of the ON duty cycle, remember-
ing DC OFF = 1 – DC,
In less critical applications, or if output load current
remains relatively constant, this output impedance error
may be judged acceptable and the external R
value adjusted to compensate for nominal expected error.
In more demanding applications, output impedance error
may be minimized by the use of the load compensation
function.
To implement the load compensation function, a voltage is
developed that is proportional to average output switch
current. This voltage is then impressed across the external
R
10
OCOMP
R
R
ESR = Lumped secondary impedance
DC OFF = OFF duty cycle
R
DC = ON duty cycle
OUT
OUT
OUT
resistor and the resulting current is then sub-
= ESR
= Effective supply output impedance
= ESR
DC OFF
1 – DC
U
1
1
where,
C
node slew rate.
SEC
FB
resistor
)(ESR).
tracted from the R
average switch current increases to maintain rough output
voltage regulation. This causes an increase in R
resistor current subtracted from the R
which feedback loop action causes a corresponding
increase in target output voltage.
Assuming a relatively fixed power supply efficiency, Eff
Average primary side current may be expressed in terms
of output current as follows:
combining the efficiency and voltage terms in a single
variable,
Switch current is converted to voltage by a sense resistor
and amplified by the current sense amplifier with associ-
ated gain G. This voltage is then impressed across the
external R
subtracted from the R
V
Expressing the product of R
value of V
OUT
Power Out = (Eff)(Power In)
(V
R
R
K1 = Dimensionless variable related to V
I
I
K1 =
IN
IN
OUT
OCOMP
V
OUT
target is:
OUT
=
= K1(I
efficiency as above
)(I
= K1
(V
(V
= K1( I
OUT
OCOMP
V
IN
V
IN
RCCOMP
= K1
OUT
OUT
OUT
)(Eff)
)(Eff)
) = (Eff)(V
V
) where,
RCCOMP
FB
OUT
resistor to form a current that is
/ I
I
V
SW
I
OUT
RCCOMP
node. As output loading increases,
FB
SW
)
I
SW
IN
(R
node. So the effective change in
,
)(I
R
SENSE
SENSE
OCOMP
R
IN
OCOMP
)
R
R
FB
R
)(G)
OUT
and G as the data sheet
FB
R
and,
FB
where,
FB
node, through
IN
, V
sn14249 14249fs
OUT
OCOMP
and