LTC1709EG-85#TR Linear Technology, LTC1709EG-85#TR Datasheet - Page 18

• Manufacturer Part Number: LTC1709EG-85#TR
• Description: IC SW REG SYNC STEP-DWN 36-SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1709EG-85#TR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 1.3 ~ 3.5 V
• Current - Output: 3A
• Voltage - Input: 4 ~ 36 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Frequency - Switching: -
• Other names: LTC1709EG-85TR; LTC1709EG85TR

APPLICATIO S I FOR ATIO
LTC1709-85
The time for the output current to ramp up is then:
By pulling the RUN/SS pin below 0.8V the LTC1709-85 is
put into low current shutdown (I
pins can be driven directly from logic as shown in
Figure 5. Diode D1 in Figure 5 reduces the start delay but
allows C
function. The RUN/SS pin has an internal 6V zener clamp
(see Functional Diagram).
18
Fault Conditions: Overcurrent Latchoff
The RUN/SS pin also provides the ability to latch off the
controllers when an overcurrent condition is detected. The
RUN/SS capacitor, C
current of both controllers. After the controllers have been
started and been given adequate time to charge up the
output capacitors and provide full load current, the RUN/
SS capacitor is used for a short-circuit timer. If the output
voltage falls to less than 70% of its nominal value after C
reaches 4.1V, C
that the output is in an overcurrent condition. If the
condition lasts for a long enough period as determined by
the size of the C
RUN/SS pin voltage is recycled. If the overload occurs
during start-up, the time can be approximated by:
If the overload occurs after start-up, the voltage on C
continue charging and will provide additional time before
latching off:
t
t
t
LO1
LO2
IRAMP
3.3V OR 5V
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
SS
(C
(C
SS
SS
to ramp up slowly providing the soft-start
D1
3
Figure 5. RUN/SS Pin Interfacing
V
1 2
• 0.6V)/(1.2 A) = 5 • 10
• 3V)/(1.2 A) = 2.5 • 10
SS
SS
.
V
IN
, the controller will be shut down until the
1 5
R
begins discharging on the assumption
U
.
A
SS
SS
*
RUN/SS
V
, is used initially to limit the inrush
C
SS
U
C
SS
1 25
.
Q
< 40 A). The RUN/SS
W
D1*
s F C
/
INTV
5
6
(C
(C
CC
R
SS
SS
SS
SS
*
)
)
RUN/SS
U
170985 F06
C
SS
SS
will
SS
This built-in overcurrent latchoff can be overridden by
providing a pull-up resistor, R
shown in Figure 5. This resistance shortens the soft-start
period and prevents the discharge of the RUN/SS capaci-
tor during a severe overcurrent and/or short-circuit con-
dition. When deriving the 5 A current from V
figure, current latchoff is always defeated. The diode
connecting this pull-up resistor to INTV
eliminates any extra supply current during shutdown
while eliminating the INTV
controller start-up.
Why should you defeat current latchoff? During the
prototyping stage of a design, there may be a problem with
noise pickup or poor layout causing the protection circuit
to latch off the controller. Defeating this feature allows
troubleshooting of the circuit and PC layout. The internal
short-circuit and foldback current limiting still remains
active, thereby protecting the power supply system from
failure. A decision can be made after the design is com-
plete whether to rely solely on foldback current limiting or
to enable the latchoff feature by removing the pull-up
resistor.
The value of the soft-start capacitor C
scaled with output voltage, output capacitance and load
current characteristics. The minimum soft-start capaci-
tance is given by:
The minimum recommended soft-start capacitor of
C
Phase-Locked Loop and Frequency Synchronization
The LTC1709-85 has a phase-locked loop comprised of an
internal voltage controlled oscillator and phase detector.
This allows the top MOSFET turn-on to be locked to the
rising edge of an external source. The frequency range of
the voltage controlled oscillator is 50% around the
center frequency f
of 1.2V corresponds to a frequency of approximately
220kHz. The nominal operating frequency range of the
LTC1709-85 is 140kHz to 310kHz.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
SS
C
SS
= 0.1 F will be sufficient for most applications.
> (C
OUT
)(V
O
OUT
. A voltage applied to the PLLFLTR pin
)(10
-4
CC
)(R
SS
loading from preventing
SENSE
, to the RUN/SS pin as
)
SS
CC
may need to be
, as in Figure 5,
IN
as in the
170985f