LTC1735IF#PBF Linear Technology, LTC1735IF#PBF Datasheet - Page 24
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LTC1735IF#PBF
Manufacturer Part Number
LTC1735IF#PBF
Description
IC SW REG SYNC STEP-DWN 20-TSSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet
1.LTC1735CSPBF.pdf
(32 pages)
Specifications of LTC1735IF#PBF
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 6 V
Current - Output
3A
Frequency - Switching
300kHz
Voltage - Input
4 ~ 30 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
APPLICATIO S I FOR ATIO
LTC1735
At full load current:
At minimum load current:
In this circuit, V
1.77V at full load, a 1.37V change. Notice that I
peak-to-peak inductor current, changes from light load to
full load. Increasing the DC inductor current decreases the
permeability of the inductor core material, which de-
creases the inductance and increases I
inductance change is a function of the inductor design.
To create the 30mV input offset, the gain of the error
amplifier must be limited. The desired gain is:
Connecting a resistor to the output of the transconductance
error amplifier will limit the voltage gain. The value of this
resistor is:
To center the output voltage variation, V
centered so that no I
voltage is nominal. V
tween V
output current:
24
R
V
A
V
ITH MAX
V
ITH NOM
ITH
V
ITH MIN
(
(
(
ITH
Input Offset Error
Error Amplifier g
)
)
)
at maximum output current and minimum
1 77
1 77
V
0 40
.
ITH
.
V
ITH MAX
15
.
ITH
0 2
A
U
.
(
V
changes from 0.40V at light load to
V
TH
V
A
V
ITH(NOM)
A
– .
2
pin current flows when the output
0 40
)
5
2
U
2
–
A
A
2
P P
m
V
2
P P
ITH MIN
V
2 0 03
is the average voltage be-
( .
1 37
(
1 3
.
0 40
• .
22 8
.
.
• .
0 084
W
mS
)
0 084
.
V
V
V
)
V
L
ITH MIN
V A
. The amount of
V A
17 54
1 085
22 8
/
(
.
/
ITH
.
.
U
)
must be
k
V
0 3
0 3
.
.
L
V
, the
V
The Thevenin equivalent of the gain limiting resistance
value of 17.54k is made up of a resistor R4 that sources
current into the I
to SGND.
To calculate the resistor values, first determine the ratio
between them:
V
Resistor R4 is:
Resistor R1 is:
Unfortunately, PCB noise can add to the voltage developed
across the sense resistor, R5, causing the I
to be slightly higher than calculated for a given output
current. The amount of noise is proportional to the output
current level. This PCB noise does not present a serious
problem but it does change the effective value of R5 so the
calculated values of R1 and R4 may need to be adjusted to
achieve the required results. Since PCB noise is a function
of the layout, it will be the same on all boards with the same
layout.
Figures 9 and 10 show the transient response before and
after active voltage positioning is implemented. Notice
that active voltage positioning reduced the transient re-
sponse from almost 200mV
Refer to Design Solutions 10 for more information about
active voltage positioning.
INTVCC
k
R
R
1
4
V
is equal to V
(
INTVCC
(
k
k
V
1
1
ITH NOM
) •
) •
k
–
R
(
R
TH
V
ITH
ITH
ITH NOM
pin and resistor R1 that sinks current
EXTVCC
)
(
( .
( .
3 79 1 17 54 84 0
3 79 1 17 54
)
or 5.2V if EXTV
P-P
5 2
3 79
to a little over 100mV
.
.
) •
) •
V
1 085
.
– .
1 085
.
.
V
k
CC
TH
V
is not used.
22 17
pin voltage
.
.
3 79
k
.
k
1735fc
P-P
.