LTC3728LEGN-1#PBF Linear Technology, LTC3728LEGN-1#PBF Datasheet - Page 26
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LTC3728LEGN-1#PBF
Manufacturer Part Number
LTC3728LEGN-1#PBF
Description
IC REG SYNC DUAL 28-SSOP
Manufacturer
Linear Technology
Series
PolyPhase®r
Type
Step-Down (Buck)r
Datasheet
1.LTC3728LEGN-1PBF.pdf
(32 pages)
Specifications of LTC3728LEGN-1#PBF
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 7 V
Current - Output
3A
Frequency - Switching
250kHz ~ 550kHz
Voltage - Input
4.5 ~ 28 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
LTC3728L-1
maximum input voltage. The output voltage ripple due to
ESR is approximately:
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 10. The Figure 11 illustrates the
current waveforms present in the various branches of the
2-phase synchronous regulators operating in the continu-
ous mode. Check the following in your layout:
1. Are the top N-channel MOSFETs M1 and M3 located
within 1cm of each other with a common drain connection
26
V
ORIPPLE
R1
R3
= R
ESR
R2
R4
(ΔI
INTV
3.3V
L
CC
) = 0.02Ω(1.67A) = 33mV
f
IN
Figure 10. LTC3728L-1 Recommended Printed Circuit Layout Diagram
RUN/SS1
SENSE1
SENSE1
V
PLLFLTR
PLLIN
FCB
I
SGND
3.3V
I
V
SENSE2
SENSE2
TH1
TH2
OSENSE1
OSENSE2
OUT
LTC3728L-1
+
–
–
+
RUN/SS2
BOOST1
BOOST2
EXTV
PGOOD
INTV
PGND
SW1
SW2
TG1
BG1
BG2
TG2
V
CC
CC
IN
P–P
at C
the two channels as it can cause a large resonant loop.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return of
C
The path formed by the top N-channel MOSFET, Schottky
diode and the C
PC trace lengths. The output capacitor (–) terminals should
be connected as close as possible to the (–) terminals
of the input capacitor by placing the capacitors next to
each other and away from the Schottky loop described
above.
3. Do the LTC3728L-1 V
nect to the (+) terminals of C
INTVCC
R
PGOOD
PU
IN
C
C
C
B1
B2
? Do not attempt to split the input decoupling for
INTVCC
must return to the combined C
V
(<7V)
PULL-UP
CERAMIC
C
VIN
V
R
IN
M1
M3
IN
IN
1μF
capacitor should have short leads and
CERAMIC
OSENSE
M2
M4
1μF
L1
C
L2
IN
OUT
pins’ resistive dividers con-
? The resistive divider must
R
R
SENSE
SENSE
C
C
OUT1
OUT2
D1
D2
OUT
3728L1 F10
(–) terminals.
V
GND
V
OUT1
OUT2
3728l1fc