LTC3728LIGN-1#TRPBF Linear Technology, LTC3728LIGN-1#TRPBF Datasheet - Page 23
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LTC3728LIGN-1#TRPBF
Manufacturer Part Number
LTC3728LIGN-1#TRPBF
Description
IC REG SW DUAL 2PH STPDWN 28SSOP
Manufacturer
Linear Technology
Series
PolyPhase®r
Type
Step-Down (Buck)r
Datasheet
1.LTC3728LEGN-1PBF.pdf
(32 pages)
Specifications of LTC3728LIGN-1#TRPBF
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.8 ~ 7 V
Current - Output
3A
Frequency - Switching
250kHz ~ 550kHz
Voltage - Input
4.5 ~ 35 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
2. INTV
control currents. The MOSFET driver current results from
switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from INTV
to ground. The resulting dQ/dt is a current out of INTV
that is typically much larger than the control circuit cur-
rent. In continuous mode, I
and Q
side MOSFETs.
Supplying INTV
from an output-derived source will scale the V
required for the driver and control circuits by a factor of
(Duty Cycle)/(Effi ciency). For example, in a 20V to 5V ap-
plication, 10mA of INTV
2.5mA of V
from 10% or more (if the driver was powered directly from
V
3. I
the fuse (if used), MOSFET, inductor, current sense resis-
tor, and input and output capacitor ESR. In continuous
mode the average output current fl ows through L and
R
and the synchronous MOSFET. If the two MOSFETs have
approximately the same R
one MOSFET can simply be summed with the resistances
of L, R
each R
R
losses), then the total resistance is 130mΩ. This results
in losses ranging from 3% to 13% as the output current
increases from 1A to 5A for a 5V output, or a 4% to 20%
loss for a 3.3V output. Effi ciency varies as the inverse
square of V
output power level. The combined effects of increasingly
lower output voltages and higher currents required by
high performance digital systems is not doubling but
quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the topside MOSFET(s),
and become signifi cant only when operating at high input
IN
SENSE
ESR
) to only a few percent.
2
R losses are predicted from the DC resistances of
= 40mΩ (sum of both input and output capacitance
B
SENSE
DS(ON)
, but is “chopped” between the topside MOSFET
CC
are the gate charges of the topside and bottom
current is the sum of the MOSFET driver and
IN
OUT
and ESR to obtain I
= 30mΩ, R
current. This reduces the mid-current loss
CC
for the same external components and
power through the EXTV
CC
L
current results in approximately
= 50mΩ, R
DS(ON)
GATECHG
2
R losses. For example, if
, then the resistance of
=f(Q
SENSE
T
+Q
CC
= 10mΩ and
B
switch input
), where Q
IN
current
CC
CC
T
voltages (typically 15V or greater). Transition losses can
be estimated from:
Other “hidden” losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% effi ciency degradation in portable systems. It is very
important to include these “system” level losses during
the design phase. The internal battery and fuse resistance
losses can be minimized by making sure that C
equate charge storage and very low ESR at the switching
frequency. A 25W supply will typically require a minimum
of 20μF to 40μF of capacitance having a maximum of 20mΩ
to 50mΩ of ESR. The LTC3728L-1 2-phase architecture
typically halves this input capacitance requirement over
competing solutions. Other losses including Schottky con-
duction losses during dead-time and inductor core losses
generally account for less than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
an amount equal to ΔI
fective series resistance of C
charge or discharge C
signal that forces the regulator to adapt to the current
change and return V
this recovery time V
overshoot or ringing, which would indicate a stability
problem. OPTI-LOOP compensation allows the transient
response to be optimized over a wide range of output
capacitance and ESR values. The availability of the I
not only allows optimization of control loop behavior but
also provides a DC coupled and AC fi ltered closed loop
response test point. The DC step, rise time and settling
Transition Loss =
OUT
OUT
OUT
LOAD
( )
(
C
V
to its steady-state value. During
can be monitored for excessive
IN
MILLER
generating the feedback error
(ESR), where ESR is the ef-
2
OUT
•
)
. ΔI
I
LTC3728L-1
MAX
( )
f
2
LOAD
5V – V
(
R
DR
also begins to
1
OUT
TH
)
•
IN
shifts by
+
23
has ad-
V
TH
3728l1fc
TH
1
pin