L6712Q STMicroelectronics, L6712Q Datasheet - Page 16
![IC CTRLR DC/DC 2PHASE 36-VFQFPN](/photos/38/74/387469/qfpn36_sml.jpg)
L6712Q
Manufacturer Part Number
L6712Q
Description
IC CTRLR DC/DC 2PHASE 36-VFQFPN
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet
1.L6712AQTR.pdf
(29 pages)
Specifications of L6712Q
Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
2
Voltage - Output
0.9 ~ 3.3 V
Current - Output
2A
Frequency - Switching
150kHz
Voltage - Input
12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-VFQFN, 36-VFQFPN
Power - Output
3.5W
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5365-5
L6712Q
L6712Q
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
L6712A L6712
3.6 INTEGRATED DROOP FUNCTION (Optional)
Droop function realizes dependence between the regulated voltage and the delivered current (Load Reg-
ulation). In this way, a part of the drop due to the output capacitor ESR in the load transient is recovered.
As shown in Figure 12, the ESR drop is present in any case, but using the droop function the total devia-
tion of the output voltage is minimized.
Connecting DROOP pin and FB pin together, forces a current I
into the feedback resistor R
Amplifier gain, the Output Characteristic is then given by the following relationship (when droop enabled):
with a remote amplifier gain of 1/2, the regulated output voltage results in being doubled.
The Droop current is equal to 50µA at nominal full load and 70µA at the OC intervention threshold, so the
maximum output voltage deviation is equal to:
Droop function is provided only for positive load; if negative load is applied, and then I
is sunk from the FB pin. The device regulates at the voltage programmed by the VID.
If this effect is not desired, shorting DROOP pin to SGND, the device regulates as a Voltage Mode Buck
converter.
Figure 12. Load Transient response (Left) and DROOP pin connection (Right).
3.7 MONITOR AND PROTECTIONS
The device monitors through pin VSEN the regulated voltage in order to build the PGOOD signal and man-
age the OVP / UVP conditions.
■
■
■
16/29
V
V
V
∆V
PGOOD. Power good output is forced low if the voltage sensed by VSEN is not within ±12% (Typ.) of
the programmed value (RA_Gain=1). It is an open drain output and it is enabled only after the soft start
is finished (2048 clock cycles after start-up). During Soft-Start this pin is forced low.
UVP. If the output voltage monitored by VSEN drops below the 60% of the reference voltage for more
than one clock period, the device turns off all mosfets and resets restarting operations with a new soft-
start phase (hiccup mode, see Figure 13).
OVP. Enabled once VCC crosses the turn-ON threshold: when the voltage monitored by VSEN reaches
115% (min) of the programmed voltage (or the external reference) the controller permanently switches
on both the low-side mosfets and switches off both the high-side mosfets in order to protect the load.
The OSC/ FAULT pin is driven high (5V) and power supply (VCC) turn off and on is required to restart
operations.
Both Over Voltage and Under Voltage are active also during soft start (Under Voltage after than the
MAX
NOM
MIN
FULL POSITIVE
DROOP PIN = FB PIN
DROOP PIN = GND
V
–
OUT
=
------------------------ -
RA_Gain
ESR DROP
–
LOAD
1
=
–
FB
⋅
------------------------ - R
RA_Gain
(
VID R
implementing the load regulation dependence. If RA_Gain is the Remote
1
–
⋅
FB
FB
⋅
I
⋅
DROOP
50µA
)
=
R2
------------------------ -
RA_Gain
Remote
V
OUT
R1
∆V
1
FBR
OC INTERVENTION
DROOP
FBG
R1
Remote
Ground
–
⋅
⎛
⎝
VID R
R2
, proportional to the output current,
AMPLIFIER
REMOTE
–
Short to GND if DROOP function is not
implemented (Classic Voltage Mode).
VSEN
FB
R
FB
⋅
=
R
--------------------- - I
–
DROOP
SENSE
------------------------ - R
RA_Gain
Rg
I
DROOP
Reference
INFOx
1
FB
⋅
C
OUT
<0, no current
F
⋅
AMPLIFIER
FB
ERROR
R
⎞
⎠
F
⋅
70µA
COMP