MAX8505EEE+T Maxim Integrated Products, MAX8505EEE+T Datasheet - Page 10

IC REG STP DWN 3A 16-QSOP

MAX8505EEE+T

Manufacturer Part Number
MAX8505EEE+T
Description
IC REG STP DWN 3A 16-QSOP
Manufacturer
Maxim Integrated Products
Type
Step-Down (Buck)r
Datasheet

Specifications of MAX8505EEE+T

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 4.68 V
Current - Output
3A
Frequency - Switching
500kHz, 1MHz
Voltage - Input
2.6 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Power - Output
1W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX8505 offers both high-side and low-side
current limits. The high-side current limit monitors the
inductor peak current and the low-side current limit
monitors the inductor valley current. Current-limit thresh-
olds are 6A (typ) for high side and 3.8A (typ) for low
side. If the output inductor current exceeds the high-
side current limit during its on-time, the high-side MOS-
FET turns off and the synchronous rectifier turns on. The
inductor current is continuously monitored during the
on-time of the low-side MOSFET. If the inductor current
is still above the low-side current limit at the moment of
the next clock cycle, the high-side MOSFET is not
turned on and the low-side MOSFET is kept on to contin-
ue discharging the output inductor current. Once the
inductor current is below the low-side current limit, the
high-side MOSFET is turned on at the next clock cycle.
If the inductor current stays less than the high-side cur-
rent limit during the minimum on duty ratio, the normal
operation resumes at the next clock cycle. Otherwise,
the current-limit operation continues.
Due to the high switching frequency and tight output
tolerance (1%), decouple V
resistor and bypass to GND with a 0.1µF capacitor.
Place the capacitor as close to V
Gate-drive voltage for the high-side N-channel switch is
generated by a bootstrapped capacitor boost circuit.
The bootstrapped capacitor is connected between the
BST pin and LX. When the low-side N-channel MOSFET
is on, it forces LX to ground and charges the capacitor
to V
MOSFET turns off and the high-side N-channel MOSFET
turns on, LX is pulled to V
from discharging into V
strapped capacitor is boosted above V
the necessary voltage for the high driver. A Schottky
diode should be used for D1.
The MAX8505 includes a frequency selection circuit to
allow it to run at 500kHz or 1MHz. The operating fre-
quency is selected through a control input, CTL, which
has three input threshold ranges that are ratiometric to
the input supply voltage. When CTL is driven to GND, it
acts like an enable pin, switching the output off. When
the CTL input is driven to >0.8
enabled with 1MHz switching. When the CTL input is
between 0.55
at 500kHz. When the CTL input is <0.45 x V
device is in shutdown.
3A, 1MHz, 1% Accurate, Internal Switch
Step-Down Regulator with Power-OK
10
IN
______________________________________________________________________________________
through diode D1. When the low-side N-channel
Frequency Selection/Enable (CTL)

V
CC
and 0.7
IN
IN
and the voltage on the boot-
. D1 prevents the capacitor

CC

V
CC
CC
V
from IN with a 10Ω
Bootstrap (BST)
V
CC
as possible.
, the part operates
CC
, the MAX8505 is
Current Limit
IN
. This provides
Decoupling
CC
, the
To reduce input transient currents during startup, a pro-
grammable soft-start is provided. The soft-start time is
given by:
A minimum capacitance of 0.01µF at REF is recom-
mended to reduce the susceptibility to switching noise.
The MAX8505 also includes an open-drain POK output
that indicates when the regulator output is within ±12%
of its nominal output. If the output voltage moves
outside this range, the POK output is pulled to ground.
Since this comparator has no hysteresis on either
threshold, a 50µs delay time is added to prevent the
POK output from chattering between states. The POK
should be pulled to V
than 5.5V through a resistor.
If V
switching. Once V
clears, and the soft-start sequence activates.
Thermal-overload protection limits total power dissipa-
tion in the device. When the junction temperature
exceeds T
device into shutdown, allowing the die to cool. The ther-
mal sensor turns the device on again after the junction
temperature cools by 20°C, resulting in a pulsed output
during continuous overload conditions. Following a
thermal-shutdown condition, the soft-start sequence
begins anew.
The equation below shows how to calculate the result-
ing duty cycle when series losses from the inductor and
internal switches are accounted for:
where V
I
inductor; R
and R
OUT
D
if R
=
CC
NLS
V
= output current (3A maximum); R
V
NLS
IN
OUT
drops below +2.25V, the UVLO circuit inhibits
+
OUT
=
I
= on-resistance of the low-side switch.
OUT
t
R
+
NHS
J
SOFT START
NHS
I
OUT
= +170°C, a thermal sensor forces the
= output voltage; V
(
R
= on-resistance of the high-side switch;
NLS
_
(
R
NLS
CC
IN
R
rises above +2.35V, the UVLO
+
NHS
=
or another supply voltage less
R
C
L
Design Procedure
)
REF
)
=
Thermal Protection
V
×
OUT
25
0 8
Power-OK (POK)
IN
.
µ
+
V
A
= input voltage;
I
OUT
L
V
Duty Cycle
IN
= ESR of the
Soft-Start
(
R
NLS
UVLO
+
R
L
)

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