MAX5098AATJ+T Maxim Integrated Products, MAX5098AATJ+T Datasheet - Page 22

• Manufacturer Part Number: MAX5098AATJ+T
• Description: IC CONV BUCK/BOOST DL 32TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: Step-Down (Buck), Step-Up (Boost)r

Specifications of MAX5098AATJ+T

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 0.85 V, 4.5 ~ 28 V
• Current - Output: 1A, 2A
• Frequency - Switching: 200kHz ~ 2.2MHz
• Voltage - Input: 4.5 ~ 19 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Power - Output: 2.76W
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

bandwidth and phase margin. Use a simple pole-zero
pair (Type II) compensation if the output capacitor ESR
zero frequency is below the unity-gain crossover fre-
quency (f
the ESR zero frequency is higher than f
pensating for a continuous mode boost converter that
has a right-half-plane zero.
Use procedure 1 to calculate the compensation net-
work components when f
1) Calculate the f
quencies:
2) Select the unity-gain crossover frequency:
If the f
Type II compensation network where R
midband zero f
frequency pole.
3) Calculate modulator gain G
quency.
where V
1V.
The transconductance error amplifier gain is:
The total loop gain at f
or
Dual, 2.2MHz, Automotive Buck or Boost
Converter with 80V Load-Dump Protection
22
______________________________________________________________________________________
G
ZERO,ESR
M
R
OSC
F
C
=
). Type III compensation is necessary when
=
V
is a peak-to-peak ramp amplitude equal to
V
OSC
V
f
ZERO ESR
IN
OSC
MID,ZERO
f
is lower than f
LC
×
(
ZERO,ESR
,
ESR
=
ESR
G
G
0 8
2
E/A
.
C
M
Buck Converter Compensation
π
=
f
+
should be equal to 1:
C
×
+
x G
ZERO,ESR
, and R
= g
2
2
L
V
(
≤
π
2
π
OUT
IN
Procedure 1 (See Figure 4)
E/A
π
f
×
×
SW
ESR
20
M
and LC double-pole fre-
×
×
1
f
ESR C
C
C
x R
g
f
×
M
= 1
C
M
and close to f
×
F
C
1
C
×
L
at the crossover fre-
F
×
×
< f
OUT
CF
OUT
L
ESR
OUT
C
OUT
provides a high-
.
C
)
F
×
)
C
or when com-
V
×
F
OUT
V
provides a
0 8
OUT
LC
.
, use a
4) Place a zero at or below the LC double pole:
5) Place a high-frequency pole at f
If the output capacitor used is a low-ESR ceramic type,
the ESR frequency is usually far away from the targeted
unity crossover frequency (f
compensation is recommended. Type III compensation
provides two-pole zero pairs. The locations of the zero
and poles should be such that the phase margin peaks
around f
or below the double pole to avoid the conditional stabil-
ity issue.
1) Select a crossover frequency:
2) Calculate the LC double-pole frequency, f
Figure 4. Type II Compensation Network
C
. It is also important to place the two zeros at
C
R
R
CF
1
2
f
V
LC
OUT
=
=
C
(
2
V
F
REF
2π
π
FB_
=
×
×
f
C
0 5
2π
-
+
.
g
≤
M
L
×
f
Procedure 2 (See Figure 5)
SW
OUT
C
f
R
SW
R
20
F
F
1
C
C
1
F
×
F
). In this case, Type III
×
×
R
f
LC
F
C
P
OUT
×
= 0.5 x f
C
COMP_
F
C
)
CF
−
1
LC
SW
:
.