HCS410-I/ST Microchip Technology, HCS410-I/ST Datasheet - Page 18
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HCS410-I/ST
Manufacturer Part Number
HCS410-I/ST
Description
IC CODE HOP ENCOD/TRNSPND 8TSSOP
Manufacturer
Microchip Technology
Series
KEELOQ®r
Type
Code Hopping Encoder and Transponderr
Specifications of HCS410-I/ST
Applications
Access Control Systems
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Ic Function
Code Hopping Encoder And Transponder
Supply Voltage Range
2V To 6.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
TSSOP
No. Of Pins
8
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCS410-I/ST
Manufacturer:
MICROCHIP
Quantity:
1 000
Company:
Part Number:
HCS410-I/ST
Manufacturer:
MICROCHIP
Quantity:
12 000
HCS410
3.0
The HCS410 has nonvolatile EEPROM memory which
is used to store user programmable options. This infor-
mation includes encoder keys, serial number, and up to
64-bits of user information.
The HCS410 has two modes in which it operates as
specified by the configuration word. In the first mode
the HCS410 has a single encoder key which is used for
encrypting the code hopping portion of a CH Mode
transmission and generating a response during IFF val-
idation. Seed transmissions are allowed in this mode.
In the second mode the HCS410 is a transponder
device with two encoder keys.
The two different operating modes of the HCS410 lead
to different EEPROM memory maps.
In IFF1 mode, the HCS410 can act as a code hopping
encoder with Seed transmission, and as an IFF token
with one key.
In IFF2 mode, the HCS410 is able to act as a code hop-
ping transmitter and an IFF token with two encoder
keys.
DS40158E-page 18
*Patents have been applied for.
10-bit Discrimination Value and 2 Overflow Bits.
10-bit Discrimination Value and 2 Overflow Bits.
64-bit Encoder Key 2/Transport Code
EEPROM ORGANIZATION AND
CONFIGURATION
(SEED0, SEED1, SEED2, SEED3)
16-bit Synchronization Counter
16-bit Synchronization Counter
(USR0, USR1, USER2, USR3)
(USR0, USR1, USER2, USR3)
64-bit Seed/Transport Code
64-bit User EEPROM
64-bit Encoder Key 1
64-bit Encoder Key 1
32-bit Serial Number
32-bit Serial Number
Configuration Data
Configuration Data
64-bit User Area
(SER0, SER1)
(SER0, SER1)
IFF1 Mode
IFF2 Mode
Preliminary
3.1
The 64-bit encoder key1 is used by the transmitter to
create the encrypted message transmitted to the
receiver in Code Hopping Mode. An IFF operation, can
use encoder key1 or key2 to generate the response to
a challenge received. The key(s) is created and pro-
grammed at the time of production using a key genera-
tion algorithm. Inputs to the key generation algorithm
are the serial number or seed for the particular
transmitter being used and a secret manufacturer’s
code. While a number of key generation algorithms are
supplied by Microchip, a user may elect to create their
own method of key generation. This may be done pro-
viding that the decoder is programmed with the same
means of creating the key for decryption purposes. If a
seed is used (CH Mode), the seed will also form part of
the input to the key generation algorithm.
3.2
The discrimination value forms part of the code hop-
ping portion of a code hopping transmission. The least
significant 10 bits of the discrimination value are typi-
cally set to the least significant bits of the serial number.
The most significant 2 bits of the discrimination value
are the overflow bits (OVR1: OVR0). These are used to
extend the range of the synchronization counter. When
the synchronization counter wraps from FFFF
0000
occurs OVR1 is cleared.
Once cleared, the overflow bits cannot be set again,
thereby creating a permanent record of the counter
overflow.
3.3
This is the 16-bit synchronization counter value that is
used to create the code hopping portion for transmis-
sion. This value will be changed after every transmis-
sion. The synchronization counter is not used in IFF
mode.
16
OVR0 is cleared and the second time a wrap
Encoder Key 1 and 2
Discrimination Value and Overflow
16-bit Synchronization Counter
2001 Microchip Technology Inc.
16
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