KS8993F-A1 Micrel Inc, KS8993F-A1 Datasheet - Page 40

• Manufacturer Part Number: KS8993F-A1
• Description: IC CONV MED 10/100 3PORT 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8993F-A1

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• For Use With: KS8993F-EVAL - EVAL KIT EXPERIMENTAL KS8993F
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

KS8993F
If a port's transmit queue is not split, both high priority packets and low priority packets have equal priority in the
transmit queue. Register 5 bits [3:2] are used to select the desired priority scheme. Optionally, the PRSEL1 and
PRSEL0 strap-in pins can be used.
Port based priority
With port based priority, each ingress port can be individually classified as a high priority receiving port. All packets
received at the high priority receiving port are marked as high priority, and will be sent to the high priority transmit
queue if the corresponding transmit queue is split. Bit 4 of registers 16, 32 and 48 is used to enable port based priority
for ports 1, 2 and 3, respectively. Optionally, the Px_PP strap-in pins can be used to enable this feature.
802.1p based priority
For 802.1p based priority, the KS8993F will examine the ingress (incoming) packets to determine whether they are
tagged. If tagged, the 3-bits priority field in the VLAN tag is retrieved and compared against the “priority base” value,
specified by register 2 bits [6:4]. The “priority base” value is programmable; its default value is 0x4.
The following figure illustrates how the 802.1p priority field is embedded in the 802.1Q VLAN tag.
If an ingress packet has an equal or higher priority value than the "priority base" value, the packet will be placed in the
high priority transmit queue if the corresponding transmit queue is split. 802.1p based priority is enabled by bit 5 of
registers 16, 32 and 48 for ports 1, 2 and 3, respectively. Optionally, the Px_1PEN strap-in pins can be used to enable
this feature.
The KS8993F provides the option to insert or remove the priority tagged frame's header at each individual egress port.
This header, consisting of the 2 bytes VLAN Protocol ID (VPID) and the 2 bytes Tag Control Information field (TCI), is
also refer to as the 802.1Q VLAN Tag.
Tag insertion is enabled by bit 2 of registers 16, 32 and 48 for ports 1, 2 and 3, respectively. Optionally, the
Px_TAGINS strap-in pins can be used to enable this feature. At the egress port, untagged packets are tagged with
August 26, 2004
1. “Transmit all high priority packets before low priority packets”, i.e. a low priority packet could be transmitted
2. “Transmit high priority packets and low priority packets at 10:1 ratio”, i.e. transmit a low priority packet after
3. “Transmit high priority packets and low priority packets at 5:1 ratio”;
4. “Transmit high priority packets and low priority packets at 2:1 ratio”.
only when the high priority queue is empty;
every 10 high priority packets are transmitted, if both queues are busy;
Bytes
802.1q VLAN Tag
Preamble
8
Bits
DA
6
Tagged Packet Type
(8100 for Ethernet)
16
Figure 6: 802.1p Priority Field Format
SA
6
VPID
2
802.1p
TCI
2
3
- 40 -
1
length
2
VLAN ID
12
LLC
46-1500
Data
FCS
4
Revision 1.0
Micrel