IDT89HPES4T4ZBBC IDT, Integrated Device Technology Inc, IDT89HPES4T4ZBBC Datasheet - Page 9

• Manufacturer Part Number: IDT89HPES4T4ZBBC
• Description: IC PCI SW 4LANE 4PORT 144-CABGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES4T4ZBBC

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89HPES4T4ZBBC

IDT 89HPES4T4 Data Sheet
T
MAX JITTER
T
ENTER TIME
T
1.
RX-EYE-MEDIUM TO
RX-IDLE-DET-DIFF-
RX-SKEW
Parameter
Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.1
GPIO (synchronous output)
GPIO (asynchronous input)
Max time between jitter median & max deviation
Unexpected Idle Enter Detect Threshold Integration Time
Lane to lane input skew
GPIO
GPIO[9,7,2:0]
1.
they are asynchronous.
2.
GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if
The values for this symbol were determined by calculation, not by testing.
Signal
EXTCLK
1
Description
Table 9 PCIe AC Timing Characteristics (Part 2 of 2)
Symbol
Tpw_13b
Table 10 GPIO AC Timing Characteristics
Figure 4 GPIO AC Timing Waveform
2
Reference
Edge
None
9 of 30
Tdo_13a
Tpw_13b
Min Max Unit
50
Min
—
1
ns
Typical
Tdo_13a
Reference
See Figure 4.
Diagram
Timing
1
Max
0.3
10
20
1
January 25, 2011
Units
ms
UI
ns