IDT89HPES16T4ZHBC IDT, Integrated Device Technology Inc, IDT89HPES16T4ZHBC Datasheet - Page 3

• Manufacturer Part Number: IDT89HPES16T4ZHBC
• Description: IC PCI SW 16LANE 4PORT 484-CABGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES16T4ZHBC

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89HPES16T4ZHBC

Hot-Plug Interface
utilizes an external I/O expander, such as that used on PC motherboards, connected to the SMBus master interface. Following reset and configura-
tion, whenever the state of a Hot-Plug output needs to be modified, the PES16T4 generates an SMBus transaction to the I/O expander with the new
value of all of the outputs. Whenever a Hot-Plug input changes, the I/O expander generates an interrupt which is received on the IOEXPINTN input pin
(alternate function of GPIO) of the PES16T4. In response to an I/O expander interrupt, the PES16T4 generates an SMBus transaction to read the
state of all of the Hot-Plug inputs from the I/O expander.
General Purpose Input/Output
may be configured independently as an input or output through software control. Some GPIO pins are shared with other on-chip functions. These
alternate functions may be enabled via software, SMBus slave interface, or serial configuration EEPROM.
action layers in compliance with PCI Express Base specification Revision 1.1. The PES16T4 can operate either as a store and forward or cut-through
switch and is designed to switch memory and I/O transactions. It supports eight Traffic Classes (TCs) and one Virtual Channel (VC) with sophisticated
resource management to enable efficient switching and I/O connectivity for servers, storage, and embedded applications.
IDT 89HPES16T4 Data Sheet
The PES16T4 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, the PES16T4
The PES16T4 provides 11 General Purpose Input/Output (GPIO) pins that may be used by the system designer as bit I/O ports. Each GPIO pin
The PES16T4 is based on a flexible and efficient layered architecture. The PCI Express layer consists of SerDes, Physical, Data Link and Trans-
(a) Unified Configuration and Management Bus
PES16T4
MSMBCLK
MSMBDAT
SSMBCLK
SSMBDAT
Processor
SMBus
Master
EEPROM
Figure 2 SMBus Interface Configuration Examples
Serial
PCI Express
Figure 3 I/O Expansion Application
Slot
...
Processor
x4
PES16T4
x4
Devices
SMBus
Other
10GbE
I/O
x4
3 of 31
Bridge
North
Processor
10GbE
I/O
x4
SATA
I/O
(b) Split Configuration and Management Buses
Memory
Memory
Memory
Memory
PES16T4
SATA
I/O
MSMBCLK
MSMBDAT
SSMBCLK
SSMBDAT
Processor
SMBus
Master
EEPROM
Serial
...
Devices
SMBus
Other
March 25, 2008