IDT89HPES32T8ZHBX IDT, Integrated Device Technology Inc, IDT89HPES32T8ZHBX Datasheet - Page 4

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IDT89HPES32T8ZHBX

Manufacturer Part Number
IDT89HPES32T8ZHBX
Description
IC PCI SW 32LANE 8PORT 500-SBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT89HPES32T8ZHBX

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
89HPES32T8ZHBX

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4(a), the master and slave SMBuses are tied together and the PES32T8 acts both as a SMBus master as well as a SMBus slave on this bus. This
requires that the SMBus master or processor that has access to PES32T8 registers supports SMBus arbitration. In some systems, this SMBus master
interface may be implemented using general purpose I/O pins on a processor or micro controller, and may not support SMBus arbitration. To support
these systems, the PES32T8 may be configured to operate in a split configuration as shown in Figure 4(b).
The PES32T8 supports reading and writing of the serial EEPROM on the master SMBus via the slave SMBus, allowing in system programming of the
serial EEPROM.
Hot-Plug Interface
utilizes an external I/O expander, such as that used on PC motherboards, connected to the SMBus master interface. Following reset and configura-
tion, whenever the state of a Hot-Plug output needs to be modified, the PES32T8 generates an SMBus transaction to the I/O expander with the new
value of all of the outputs. Whenever a Hot-Plug input changes, the I/O expander generates an interrupt which is received on the IOEXPINTN input pin
(alternate function of GPIO) of the PES32T8. In response to an I/O expander interrupt, the PES32T8 generates an SMBus transaction to read the
state of all of the Hot-Plug inputs from the I/O expander.
General Purpose Input/Output
may be configured independently as an input or output through software control. Some GPIO pins are shared with other on-chip functions. These
alternate functions may be enabled via software, SMBus slave interface, or serial configuration EEPROM.
IDT 89PES32T8 Data Sheet
As shown in Figure 4, the master and slave SMBuses may be used in a unified or split configuration. In the unified configuration, shown in Figure
In the split configuration, the master and slave SMBuses operate as two independent buses and thus multi-master arbitration is never required.
The PES32T8 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, the PES32T8
The PES32T8 provides 16 General Purpose Input/Output (GPIO) pins that may be used by the system designer as bit I/O ports. Each GPIO pin
(a) Unified Configuration and Management Bus
PES32T8
MSMBCLK
MSMBDAT
SSMBCLK
SSMBDAT
Processor
SMBus
Master
EEPROM
Figure 4 SMBus Interface Configuration Examples
Serial
...
Devices
SMBus
Other
4 of 37
(b) Split Configuration and Management Buses
PES32T8
MSMBCLK
MSMBDAT
SSMBCLK
SSMBDAT
Processor
SMBus
Master
EEPROM
Serial
...
Devices
SMBus
Other
March 25, 2008

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