IDT72P51749L5BB8 IDT, Integrated Device Technology Inc, IDT72P51749L5BB8 Datasheet - Page 80

• Manufacturer Part Number: IDT72P51749L5BB8
• Description: IC FLOW CTRL 36BIT 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51749L5BB8

• Configuration: Dual
• Density: 1.125Mb
• Access Time (max): 3.6ns
• Word Size: 36b
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 200MHz
• Supply Current: 150mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51749L5BB8

NOTES:
1. If devices are configured for Direct operation of the PAFn/PAEn flag busses the FXI/EXI of the MASTER device should be tied LOW. All other devices tied HIGH. The FXO/EXO
2. Q outputs must not be mixed between devices, i.e. Q0 of device 1 must connect to Q0 of device 2, etc.
IDT72P51749/72P51759/72P51769 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648, 2,359,296, and 4,718,592 bits
Serial Programming Data Input
Serial Enable
Data Bus
Write Clock
Write Queue Select
Write Address
Full Strobe
Programmable Almost Full
Full Sync1
Full Flag
Almost Full Flag
Serial Clock
Write Enable
WCS1
WCS2
WCS0
Full Sync n
outputs are DNC (Do Not Connect).
Full Sync2
DONE
Figure 68. Expansion using WCS / RCS
WADEN
WCLK
WEN
WCS
WRADD
FSTR
PAFn
FSYNC
FF
PAF
D 0 -D 35
WCLK
WEN
WCS
WRADD
WADEN
FSTR
PAFn
FSYNC
FF
PAF
SCLK
D 0 -D 35
WCLK
WEN
WCS
WRADD
FSTR
PAFn
FSYNC
FF
PAF
SCLK
D 0 -D 35
WADEN
SCLK
SENI
SENO
SENO
SENI
SENO
SENI
SI
DEVICE
DEVICE
SO FXO EXO
SI
FXO EXO
SO FXO EXO
FXI
SI
DEVICE
1
0
FXI
FXI
2
80
EXI
EXI
EXI
Q 0 -Q 35
Q 0 -Q 35
Q 0 -Q 35
RADEN
RADEN
RDADD
ESYNC
RADEN
ESYNC
RDADD
ESYNC
RDADD
PAEn
RCLK
RCLK
ESTR
RCLK
ESTR
ESTR
PAEn
PAEn
REN
REN
RCS
PAE
RCS
REN
RCS
PAE
PAE
EF
PR
PR
PR
EF
EF
COMMERCIAL AND INDUSTRIAL
6714 drw75a
TEMPERATURE RANGES
Programmable Almost Empty
SEPTEMBER 27, 2004
Empty/Output Ready Flag
Read Queue Select
Almost Empty Flag
Output Data Bus
Read Address
Empty Sync n
Empty Strobe
Empty Sync 1
Empty Sync 2
Read Enable
Read Clock
Packet
Reads
RCS1
RCS2
RCS0