IDT72V51456L6BB IDT, Integrated Device Technology Inc, IDT72V51456L6BB Datasheet - Page 49

• Manufacturer Part Number: IDT72V51456L6BB
• Description: IC FLOW CTRL MULTI QUEUE 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72V51456L6BB

• Configuration: Dual
• Density: 2Mb
• Access Time (max): 3.7ns
• Word Size: 36b
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 166MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 100mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V51456L6BB

Cycle:
*A*
*AA* Sector 2 of device 0 is selected for the PAFn bus. The bus is currently providing status of a previously selected sector, Sect Y of device X.
*B*
*BB* Queue 16 of device 0 is selected on the write port.
*C*
*CC* PAFn continues to show status of Sect 2 D0.
*D*
*DD* PAF[7] goes HIGH to show that D0 Q16 is not almost empty due to the read on cycle *C*.
*E*
*EE* Word, Wy+1 is written into D0 Q16.
*F*
*FF* PAF[7] and the discrete PAF flag go LOW to show the write on cycle *DD* causes Q16 of D0 to again go almost full.
*G*
IDT72V51436/72V51446/72V51456 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
Device 0
Queue 16 of device 0 is selected for read operations.
The last word in the output register is available on Qout. OE was previously taken LOW so the output bus is in Low-Impedance.
Word, Wx+1 is read out from the previous queue due to the FWFT effect.
The PAFn bus is updated with the sector selected on the previous cycle, D0 Sect 2. PAF[7] is LOW showing the status of queue 16.
The PAFn outputs of the device previously selected on the PAFn bus go to High-Impedance.
A new sector, Sect 1 of Device 7 is selected for the PAFn bus.
Word, Wd-m+1 is read from Q16 D0 due to the FWFT operation. This read is at the PAFn boundary of queue D0 Q16. This read will cause the PAF[7] output to go from
LOW to HIGH (almost full to not almost full), after a delay t
No read operations occur, REN is HIGH.
The active queue PAF flag of device 0 goes from High-Impedance to Low-Impedance.
Word, Wy is written into D0 Q16.
Queue 2 of Device 6 is selected for write operations.
Word, Wd-m+2 is read out due to FWFT operation.
Word, Wy+2 is written into D0 Q16.
Word, W0 is read from Q0 of D6, selected on cycle *E*, due to FWFT.
Bus
Device 0
WRADD
WADEN
RDADD
RADEN
RCLK
ESTR
WCLK
FSTR
PAFn
PAFn
PAFn
WEN
Prev.
Qout
PAF
REN
Din
OE
t
D
D
QS
t
AS
t
t
X
X
STS
AS
Quad y
Quad y
000 01111
D0Q16
D0 sect2
t
OLZ
*A*
*AA*
000 xxx1
t
Prev. Q
t
t
AH
STH
t
QH
W
AH
X
t
QS
HIGH-Z
t
AS
HIGH - Z
Figure 29. PAF n - Direct Mode, Flag Operation
*B*
D0 Q16
*BB*
t
SKEW3
A
t
t
STS
PAFHZ
t
t
AS
Prev. Q
t
PAFLZ
t
AH
W
QH
+ WCLK + t
111 xxxx0
X +1
D7 sect 1
D0Sect2
D0Sect2
*C*
*CC*
PAF
t
A
t
SKEW3
1
t
t
AH
. If t
STH
49
0xxx xxxx
0xxx xxxx
SKEW3
t
ENS
*D*
t
is violated add an extra WCLK cycle.
DS
Word W
D0 Q16
*DD*
2
t
QS
t
DH
y
D0 Q16
W
t
t
PAF
PAFLZ
D-M+1
110 00010
D6Q2
*E
*
D0Sect2
D0Sect2
t
DS
D0 Q16
*EE*
W
t
y+1
QH
t
HIGH-Z
DH
1xxx xxxx
1xxx xxxx
*F
*
COMMERCIAL AND INDUSTRIAL
t
DS
D0 Q16
t
A
W
*FF*
y+2
TEMPERATURE RANGES
W
D0 Q16
t
DH
D - M + 2
t
ENH
t
t
PAF
*G*
D0Sect2
D0Sect2 0xxx xxxx
WAF
t
A
0xxx xxxx
D6 Q2
W
5935 drw32
0