IDT88P8342BHGI IDT, Integrated Device Technology Inc, IDT88P8342BHGI Datasheet - Page 54

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IDT88P8342BHGI

Manufacturer Part Number
IDT88P8342BHGI
Description
IC SPI3-SPI4 EXCHANGE 820-PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT88P8342BHGI

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
88P8342BHGI

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interrupt enable.
Primary interrupt status register (0x2C in the
direct accessed space)
TABLE 44 - PRIMARY INTERRUPT STATUS REGIS-
TER (0x2C IN THE DIRECT ACCESSED SPACE)
read-only access. The interrupts for the primary interrupt status register must
be acknowledged by servicing the corresponding secondary interrupt status
registers.
allowing an interrupt in the Module Status Register (secondary interrupt register
0x24).
allowing an interrupt in the module status register (secondary interrupt register
0x25).
IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4
MODULE_A
MODULE_B
Reserved
SPI-4
SECONDARY
Reserved
Reserved
SPI-43_INSERT_EN
0=Disable insert interrupt
1=Enable insert interrupt
PMON_EN
0=Disable PMON interrupt
1=Enable PMON interrupt
The primary interrupt status register (0x2C in the direct accessed space) has
MODULE_A
0=No MODULE_A interrupt active
1=MODULE_A interrupt is active
MODULE_B
0=No MODULE_B interrupt active
1=MODULE_B interrupt is active
Field
Performance Monitor event interrupt enable.
When active, the MODULE_A field is responsible for
When active, the MODULE_B field is responsible for
SPI-4 ingress to SPI-3 egress insert event
Bits
7:6
0
1
2
3
4
5
Length
1
1
1
1
1
2
1
Initial Value
0
0
0
0
0
0
0
54
in the SPI-4 status register (secondary interrupt register 0x22).
allowing an interrupt in the Secondary Interrupt Status Register (secondary
interrupt register 0x2D).
Secondary interrupt status register (0x2D in the
direct accessed space)
TABLE 45 - SECONDARY INTERRUPT STATUS
REGISTER (0x2D IN THE DIRECT ACCESSED SPACE)
has read and write access.
fields are cleared by a microprocessor write cycle, where a logical one must
be written to clear the field(s) targeted.
and can only be active if the SECONDARY_EN field is active in the primary
interrupt enable register (Direct 0x2C).
TIME_BASE
INDIRECT_ACCESS
Reserved
SPI-4 When active, the SPI-4 field is responsible for allowing an interrupt
0=No SPI-4 interrupt active
1=SPI-4 interrupt is active
SECONDARY
0=No SECONDARY interrupt active
1=SECONDARY interrupt is active
The secondary interrupt status register (0x2D in the direct accessed space)
The secondary interrupt status register has read access, and Interrupt status
The secondary interrupt status register is a secondary interrupt status register
TIME_BASE
0=No time base event
1=Time base has expired
INDIRECT_ACCESS
0=No indirect access event
1=Indirect access has completed
Field
When active, the SECONDARY field is responsible for
Time base expiration interrupt indication.
Indirect access completion interrupt indication.
INDUSTRIAL TEMPERATURE RANGE
Bits
7:2
0
1
Length
1
1
6
APRIL 10, 2006
Initial Value
0
0
0

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