IDT72P51777L7-5BB IDT, Integrated Device Technology Inc, IDT72P51777L7-5BB Datasheet - Page 34

• Manufacturer Part Number: IDT72P51777L7-5BB
• Description: IC FLOW CTRL 40BIT 376-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51777L7-5BB

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51777L7-5BB

SWITCHING QUEUES ON THE WRITE PORT
configured up to a maximum of 128 queues. Data is written into a queue using
the Data Input (Din) bus, Write Clock (WCLK) and Write Enable (WEN) signals.
Selecting a queue occurs by placing the queue address on the Write Address
changing (switching) queues every four (4) clock cycles. To switch from the
Present Queue (PQ) to another queue requires a queue address to be placed
on the Write Address Bus (WRADD) bus and a rising edge of Write Clock
(WCLK) and Write Address Enable (WADEN) is HIGH. There are no restrictions
as to the order to which queues are selected or switched into or out of.
NOTES:
1. PQ = Present Queue
* Requires 4 clock cycles to switch queues.
IDT72P51767/72P51777 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 40 BIT WIDE CONFIGURATION 5,898,240 and 11,796,480 bits
The IDT72P51767/72P51777 multi-queue flow-control devices can be
The IDT72P51767/72P51777 multi-queue flow-control device supports
NQ = Next Queue
WADEN
WCLK
WEN
Din
WRADD
WADEN
WCLK
PQ
Queue
address
Figure 11. Write Port Switching Queues Signal Sequence
QS-1
Queue Switch Cycles *
PQ
Figure 12. Switching Queues Bus Efficiency
Queue Switch Cycle
QS0
PQ
QS1
PQ
34
bus (WRADD) during a rising edge of WCLK while Write Address Enable
(WADEN) is HIGH. For reference, the state of Write Enable (WEN) is a “Don’t
Care” during a queue selection. WEN has significance during the queue mark
operation. Selecting a queue requires 4 WCLK cycles. Refer to Figure 11, Write
Port Switching Queues Signal Sequence.
the IDT72P51767/72P51777 multi-queue flow-control device can continue to
write into the Present Queue (PQ). The Present Queue is defined as the current
selected queue. Refer to Figure 12, Switching Queues Bus Efficiency.
QS2
For maximum efficiency, during the 4 clock cycles required to switch queues
Queue
address
NQ
QS3
NQ
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
6724 drw13
FEBRUARY 11, 2009
6724 drw14