KS8997 Micrel Inc, KS8997 Datasheet
KS8997
Specifications of KS8997
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KS8997 Summary of contents
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... The KS8997 contains eight 10/100 physical layer transceivers, eight MAC (Media Access Control) units with an integrated layer 2 switch. The device runs as an eight port integrated switch. The KS8997 is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through I/O strapping programming at system reset time ...
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... Available in 128-pin PQFP package February 2007 Applications • Small workgroup switches • VoIP infrastructure switches Ordering Information Part Number Temp. Range KS8997 0°C to +70°C KSZ8997 0°C to +70°C 2 Package 128-Pin PQFP 128-Pin PQFP M9999-022807-1.1 ...
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Revision History Revision Date Summary of Changes 1.00 11/27/00 Document origination. 1.01 04/02/01 Update maximum frame size. Update EEPROM priority descriptions. Update I/O descriptions. Update Electrical Characteristics. 1.02 05/11/01 Add MDI/MDI_X description/ 1.03 06/22/01 Change electrical requirements. 1.04 06/25/01 Correct ...
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Contents System Level Applications ................................................................................................................................................6 Pin Description ..................................................................................................................................................................7 I/O Grouping....................................................................................................................................................................11 I/O Descriptions...............................................................................................................................................................11 Pin Configuration.............................................................................................................................................................14 Functional Overview: Physical Layer Transceiver ..........................................................................................................15 100BaseTX Transmit...................................................................................................................................................15 100BaseTX Receive....................................................................................................................................................15 PLL Clock Synthesizer ................................................................................................................................................15 Scrambler/De-Scrambler (100BaseTX only)...............................................................................................................15 10BaseT Transmit .......................................................................................................................................................15 10BaseT Receive ........................................................................................................................................................15 Power Management ....................................................................................................................................................15 ...
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Priority Classification Control – 802.1p tag field..........................................................................................................21 Port 1 Control Register................................................................................................................................................22 Port 2 Control Register................................................................................................................................................22 Port 3 Control Register................................................................................................................................................22 Port 4 Control Register................................................................................................................................................23 Port 5 Control Register................................................................................................................................................23 Port 6 Control Register................................................................................................................................................23 Port 7 Control Register................................................................................................................................................24 Port 8 Control Register................................................................................................................................................24 Reserved ...
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... System Level Applications The KS8997 can be configured to fit in an eight port 10/100 application. The major benefits of using the KS8997 are the lower power consumption, February 2007 unmanaged operation, flexible configuration, built in frame buffering, VLAN abilities and traffic priority control. An application is depicted below. ...
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Pin Description Pin Number Pin Name Type(1) 1 VDD_RX Pwr 2 GND_RX Gnd 3 GND_RX Gnd 4 VDD_RX Pwr 5 RXP[ RXM[ GND-ISO Gnd 8 TXP[ TXM[ GND_TX Gnd 11 VDD_TX Pwr ...
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Pin Number Pin Name Type(1) 39 GND-ISO Gnd 40 RXP[ RXM[ GND_TX Gnd 43 TXP[ TXM[ VDD_TX Pwr 46 VDD_TX Pwr 47 TXP[ TXM[ GND_TX Gnd 50 RXP[8] ...
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Pin Number Pin Name Type(1) 78 GND Gnd 79 LED[3][3] I/O 80 LED[3][2] I/O 81 LED[3][0] I/O 82 LED[4][3] I/O 83 LED[4][2] I/O 84 LED[4][0] I/O 85 VDD Pwr 86 GND Gnd 87 LED[5][3] I/O 88 LED[5][2] I/O 89 LED[5][0] ...
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Pin Number Pin Name Type(1) 117 RXM[1] I 118 GND_TX Gnd 119 TXP[1] O 120 TXM[1] O 121 VDD_TX Pwr 122 VDD_TX Pwr 123 TXP[2] O 124 TXM[2] O 125 GND_TX Gnd 126 RXP[2] I 127 RXM[2] I 128 GND-ISO ...
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I/O Grouping Group Name Description PHY Physical interface IND LED Indicators UP Unmanaged Programmable CTRL Control and Miscellaneous TEST Test (Factory) PWR/GND Power and Ground I/O Descriptions Group I/O Names Active Status PHY RXP[1:8] RXM[1:8] IND TXP[1:8] TXM[1:8] ISET LED[1:8][0] ...
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Group I/O Names Active Status LED[2][0] LED[3][3] LED[3][2] LED[3][0] LED[4][3] LED[4][2] LED[4][0] LED[5][3] LED[5][2] LED[5][0] LED[6][3] LED[6][2] LED[6][0] LED[7][3] LED[7][2] LED[7][0] LED[8][3] LED[8][2] LED[8][0] CTRL EN1P X1 X2 SCL SDA RST# TEST T[1], T[5] RLPBK February 2007 Description Reserved – ...
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Group I/O Names Active Status BIST PWR/GND VDD_RX GND_RX VDD_TX GND_TX VDD_RCV GND_RCV VDD_PLLTX GND_PLLTX GND-SIO VDD VDD-IO GND Note: 1. All unmanaged programming takes place at reset time only. For unmanaged programming Float Pull-down, U ...
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Pin Configuration February 2007 128-Pin PQFP (Q) 14 M9999-022807-1.1 ...
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... Power-Save Mode The KS8997 will turn off everything except for the Energy Detect and PLL circuits when the cable is not installed on an individual port basis. In other words, the KS8997 will shutdown most of the internal circuits to save power if there is no link. February 2007 15 M9999-022807-1 ...
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... If auto-negotiation is not supported or the link partner to the KS8997 is forced to bypass auto-negotiation, then the mode is set by observing the signal at the receiver. This is known as parallel mode because while the transmitter is sending auto-negotiation advertisements, the receiver is listening for advertisements or a fixed signal protocol ...
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... If the DA look-up result is a “match”, the KS8997 will use the destination port information to determine where the packet goes. • If the DA look-up result is a “miss”, the KS8997 will forward the packet to all other ports except the port that received the packet. ...
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... The KS8997 will issue a flow control frame (XOFF), containing the maximum pause time defined in IEEE standard 802.3x. Once the resource is freed up, the KS8997 will send out the other flow control frame (XON) with zero pause time to turn off the flow control (turn on transmission to the port). A hysteresis feature is provided to prevent flow control mechanism from being activated and deactivated too many times ...
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... Programmable Features Priority Schemes The KS8997 can determine priority through three different means at the ingress point. The first method is a simple per port method, the second is via the 802.1p frame tag and the third is by viewing the DSCP (TOS) field in the IPv4 header ...
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The table below briefly summarizes priority features. For more detailed settings see “EEPROM Memory Map” section. Register(s) Bit(s) Global/Port 2 3 4-11 0 4-11 5 40-47 7-0 4- 7-0 4-11 3 VLAN Operation The VLAN’s are ...
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... The EEPROM interface utilizes 2 pins that provide a clock and a serial data path. As part of the initialization sequence, the KS8997 reads the contents of the EEPROM and loads the values into the appropriate registers. Note that the first two bytes in the EEPROM must be “55” and “99” respectively for the loading to occur properly. If these first two values are not correct, all other data will be ignored ...
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Address Name Description 0 = State “001” is low priority 1 = State “000” is high priority State “000” is low priority Port 1 Control Register 4 7-6 Reserved – set to zero TOS priority classification ...
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Address Name Description 0 = Low priority Insert VLAN tags for port 3 if non-existent Enable 0 = Disable Strip VLAN tags for port 3 if existent 1 = Enable Disable Enable ...
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Address Name Description TOS priority classification enable for port Enable 0 = Disable 802.1p priority classification enable for port Enable 0 = Disable Port based priority classification for port 6 ...
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Address Name Description Enable high and low output priority queues for port Enable 0 = Disable Reserved Register 12 7-0 Reserved Port 1 VLAN Mask Register 13 7 Reserved Port 8 inclusion 1 = Port ...
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Address Name Description Port 3 VLAN Mask Register 15 7 Reserved Port 8 inclusion Port 8 in the same VLAN as port Port 8 not in the same VLAN as port 3 Port ...
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Address Name Description Port 6 inclusion Port 6 in the same VLAN as port Port 6 not in the same VLAN as port 5 Port 5 inclusion Port 5 ...
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Address Name Description Port 3 inclusion Port 3 in the same VLAN as port Port 3 not in the same VLAN as port 7 Port 2 inclusion Port 2 ...
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Address Name Description Port 4 VLAN Tag Insertion Value Registers 28 7-5 User priority [2: CFI 28 3-0 VID [11:8] 29 7-0 VID [7:0] Port 5 VLAN Tag Insertion Value Registers 30 7-5 User priority [2: ...
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Address Name Description Station MAC Address Registers (all ports – MAC control frames only) 48 7-0 MAC address [47:40] 49 7-0 MAC address [39:32] 50 7-0 MAC address [31:24] 51 7-0 MAC address [23:16] 52 7-0 MAC address [15:8] 53 ...
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Absolute Maximum Ratings Supply Voltage (VDD_RX, VDD_TX, VDD_RCV, VDD, VDD_PLLTX).............................. –0.5V to +2.3V (VDDIO) ................................................. –0.5V to +3.8V Input Voltage ............................................. –0.5V to +4.0V Output Voltage .......................................... –0.5V to +4.0V Lead Temperature (soldering, 10 sec) .................... 270°C Storage Temperature (T ...
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Symbol Parameter Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Output Jitters 10BaseT Receive V Squelch Threshold SQ 10BaseT Transmit (measured differentially after 1:1 transformer Peak Differential Output Voltage P Jitters Added Rise/Fall Times Notes: 1. ...
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Timing Diagrams Symbol Parameter Clock Cycle t CYC Set-Up Time t S Hold Time t H Symbol Parameter Clock Cycle t CYC Set-Up Time t OV February 2007 Figure 2. EEPROM Input Timing Diagram Table 4. EEPROM Timing Parameters Figure ...
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Reference Circuit See “I/O Description” section for pull-up/pull-down and float information. February 2007 Figure 4. Unmanaged Programming Circuit 34 M9999-022807-1.1 ...
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Coding In 100BaseTX and 100BaseFX the data and frame control are encoded in the transmitter (and decoded in the receiver) using a 4B/5B code. The extra code space is required to encode extra control (frame delineation) points ...
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... Preamble and Start of Frame Delimiter 48-bit Destination MAC Address 48-bit Source MAC Address VLAN and priority tag (optional) Frame Length Higher Layer Protocol and Frame Data 32-bit Cyclical Redundancy Check End of Stream Delimiter Inter Frame Idles Table 7. MAC Frame for 802.3 36 KS8997/KSZ8997 M9999-022807-1.1 ...
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Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common- mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer characteristics. Characteristics Name Turns Ratio ...
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Package Information February 2007 128-Pin PQFP (Q) 38 M9999-022807-1.1 ...
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MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is ...