KS8893MQL Micrel Inc, KS8893MQL Datasheet - Page 23

• Manufacturer Part Number: KS8893MQL
• Description: IC MANAGED SWITCH 10/100 128PQFP
• Manufacturer: Micrel Inc

Specifications of KS8893MQL

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Number Of Primary Switch Ports: 3
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Commercial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1457

December 2007
Ball Number
K7
J8
K8
J9
K9
J10
K10
H10
H9
G9
G10
F9
F10
Ball Name
SMRXD2
SMRXD1
SMRXD0
SCOL
SCRS
SCONF1
SCONF0
MDC
MDIO
SPIQ
SCL
SDA
SPIS_N
Type
Ipd/O
Ipd/O
I/O
I/O
I/O
I
I
I
I/O
O
I/O
I/O
I
(1)
23
Ball Function Description
Switch MII receive data bit 2
Strap option: switch MII is in
Switch MII receive data bit 1
Strap option: Switch MII is in
Switch MII receive data bit 0
Strap option: switch will accept packet size up to
Switch MII collision detect
Switch MII carrier sense
Switch MII interface configuration
MII management interface: clock input
MII management interface: data input/output
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode: serial data output
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode / I
I
See description in pins 100 and 101.
SPI slave mode: serial data input
I
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
SPI slave mode: chip select (active low)
When SPIS_N is high, the KSZ8893MBL is deselected and
SPIQ is held in high impedance state.
A high-to-low transition is used to initiate SPI data transfer.
See description in pins 100 and 101.
Note: an external pull-up is needed on this pin when it is in
use.
2
2
(SCONF1, SCONF0)
(0,0)
(0,1)
(1,0)
(1,1)
C master mode: clock output
C master/slave mode: serial data input/output
PD (default) = full-duplex mode
PU = half-duplex mode
PD (default) = 100Mbps mode
PU = 10Mbps mode
PD = 1536 bytes (inclusive)
PU = 1522 bytes (tagged), 1518 bytes (untagged)
2
C slave mode: clock input
Description
disable, outputs tri-stated
PHY mode MII
MAC mode MII
PHY mode SNI
M9999-121007-1.5