ADUM1401CRW Analog Devices Inc, ADUM1401CRW Datasheet - Page 27

no-image

ADUM1401CRW

Manufacturer Part Number
ADUM1401CRW
Description
IC DIGITAL ISOLATOR 4CH 16-SOIC
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet

Specifications of ADUM1401CRW

Rohs Status
RoHS non-compliant
Design Resources
16-Bit Fully Isolated Voltage Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0063) 16-Bit Fully Isolated 4 mA to 20 mA Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0064) 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065)
Inputs - Side 1/side 2
3/1
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
90Mbps
Propagation Delay
32ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 105°C

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUM1401CRW
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
ADUM1401CRWZ
Manufacturer:
AD
Quantity:
20 000
Part Number:
ADUM1401CRWZ
Manufacturer:
ADI
Quantity:
17 308
Part Number:
ADUM1401CRWZ-RL
Manufacturer:
TI
Quantity:
12 000
Company:
Part Number:
ADUM1401CRWZ-RL
Quantity:
1 000
APPLICATIONS INFORMATION
PC BOARD LAYOUT
The ADuM140x digital isolator requires no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins (see
Figure 17). Bypass capacitors are most conveniently connected
between Pin 1 and Pin 2 for V
for V
0.1 μF. The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
Bypassing between Pin 1 and Pin 8 and between Pin 9 and
Pin 16 should also be considered, unless the ground pair on
each package side is connected close to the package.
In applications involving high common-mode transients, care
should be taken to ensure that board coupling across the isolation
barrier is minimized. Furthermore, the board layout should be
designed such that any coupling that does occur equally affects
all pins on a given component side. Failure to ensure this could
cause voltage differentials between pins exceeding the Absolute
Maximum Ratings of the device, thereby leading to latch-up or
permanent damage.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a Logic 0 output may differ from the propagation delay
to a Logic 1 output.
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of how
accurately the timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM140x component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM140x
components operating under the same conditions.
INPUT (V
OUTPUT (V
DD2
V
V
NC/V
Ix
IC
. The capacitor value should be between 0.01 μF and
ID/
)
GND
GND
V
Ox
/V
Figure 17. Recommended Printed Circuit Board Layout
V
DD1
V
V
OC
OD
)
E1
IA
IB
1
1
Figure 18. Propagation Delay Parameters
t
PLH
DD1
and between Pin 15 and Pin 16
t
PHL
50%
50%
V
GND
V
V
V
V
V
GND
DD2
OA
OB
OC/
OD/
E2
2
V
V
2
IC
ID
Rev. G | Page 27 of 32
DC CORRECTNESS AND MAGNETIC FIELD
IMMUNITY
Positive and negative logic transitions at the isolator input
cause narrow (~1 ns) pulses to be sent to the decoder via the
transformer. The decoder is bistable and is, therefore, either set
or reset by the pulses, indicating input logic transitions. In the
absence of logic transitions at the input for more than ~1 μs, a
periodic set of refresh pulses indicative of the correct input state
are sent to ensure dc correctness at the output. If the decoder
receives no internal pulses of more than about 5 μs, the input
side is assumed to be unpowered or nonfunctional, in which
case the isolator output is forced to a default state (see Table 15)
by the watchdog timer circuit.
The limitation on the magnetic field immunity of the ADuM140x
is set by the condition in which induced voltage in the receiving
coil of the transformer is sufficiently large enough to either
falsely set or reset the decoder. The following analysis defines
the conditions under which this may occur. The 3 V operating
condition of the ADuM140x is examined because it represents
the most susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
where:
β is magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
Given the geometry of the receiving coil in the ADuM140x and
an imposed requirement that the induced voltage be 50% at
most of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated as shown in Figure 19.
n
is the radius of the n
V = (−dβ/dt)
0.001
0.01
Figure 19. Maximum Allowable External Magnetic Flux Density
100
0.1
10
1
1k
ADuM1400/ADuM1401/ADuM1402
10k
∏r
MAGNETIC FIELD FREQUENCY (Hz)
n
2
th
; n = 1, 2, … , N
turn in the receiving coil (cm).
100k
1M
10M
100M

Related parts for ADUM1401CRW