SI8441BB-C-IS1 Silicon Laboratories Inc, SI8441BB-C-IS1 Datasheet - Page 18
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SI8441BB-C-IS1
Manufacturer Part Number
SI8441BB-C-IS1
Description
IC ISOLATOR DGTL 4CH 16SOIC
Manufacturer
Silicon Laboratories Inc
Series
ISOpror
Specifications of SI8441BB-C-IS1
Inputs - Side 1/side 2
3/1
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
2.7 V ~ 5.5 V
Data Rate
150Mbps
Propagation Delay
6ns
Output Type
Tri-State
Package / Case
16-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 125°C
Operating Supply Voltage (typ)
3.3/5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Si8440/41/42/45
18
Notes:
Input
V
1. VDDI and VDDO are the input and output power supplies. V
2. X = not applicable; H = Logic High; L = Logic Low; Hi-Z = High Impedance.
3. It is recommended that the enable inputs be connected to an external logic high or low level when the Si84xx is
4. No Connect (NC) replaces EN1 on Si8440/45. No Connect replaces EN2 on the Si8445. No Connects are not internally
5. "Powered" state (P) is defined as 2.70 V < VDD < 5.5 V.
6. "Unpowered" state (UP) is defined as VDD = 0 V.
7. When using the enable pin (EN) function, the output pin state is driven to a logic low state when the EN pin is disabled
H
L
X
X
X
X
I
1,2
is the enable control input located on the same output side.
operating in noisy environments.
connected and can be left floating, tied to VDD, or tied to GND.
(EN = 0) in Revision C. Revision D outputs go into a high-impedance state when the EN pin is disabled (EN = 0). See
"4. Errata and Design Migration Guidelines (Revision C Only)" on page 25 for more details.
Input
H or NC
H or NC
H or NC
EN
X
L
L
1,2,3,4
State
VDDI
UP
UP
P
P
P
P
1,5,6
Table 12. Si84xx Logic Operation Table
State
VDDO
UP
P
P
P
P
P
1,5,6
Undetermined
V
O
Hi-Z or L
Hi-Z or L
Output
Rev. 1.2
H
L
L
7
7
1,2
I
and V
Enabled, normal operation.
Disabled.
Upon transition of VDDI from unpowered to pow-
ered, V
than 1 µs.
Disabled.
Upon transition of VDDO from unpowered to pow-
ered, V
1 µs, if EN is in either the H or NC state. Upon
transition of VDDO from unpowered to powered,
V
O
O
returns to Hi-Z within 1 µs if EN is L.
are the respective input and output terminals. EN
O
O
returns to the same state as V
returns to the same state as V
Comments
I
I
in less
within