HCPL-3140-500E Avago Technologies US Inc., HCPL-3140-500E Datasheet - Page 15

• Manufacturer Part Number: HCPL-3140-500E
• Description: OPTOCOUPLER 1CH 0.4A 8-SMD
• Manufacturer: Avago Technologies US Inc.

Specifications of HCPL-3140-500E

• Package / Case: 8-SMD Gull Wing
• Voltage - Isolation: 3750Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 600mA
• Propagation Delay High - Low @ If: 300ns @ 8mA
• Current - Dc Forward (if): 25mA
• Input Type: DC
• Output Type: Push-Pull, Totem-Pole
• Mounting Type: Surface Mount, Gull Wing
• Isolation Voltage: 3750 Vrms
• Maximum Fall Time: 50 ns
• Maximum Forward Diode Current: 25 mA
• Maximum Rise Time: 50 ns
• Minimum Forward Diode Voltage: 1.2 V
• Output Device: Logic Gate Photo IC
• Configuration: 1 Channel
• Maximum Forward Diode Voltage: 1.8 V
• Maximum Reverse Diode Voltage: 5 V
• Maximum Power Dissipation: 250 mW
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Number Of Elements: 1
• Forward Voltage: 1.8V
• Forward Current: 25mA
• Package Type: PDIP SMD
• Operating Temp Range: -40C to 100C
• Power Dissipation: 250mW
• Propagation Delay Time: 700ns
• Pin Count: 8
• Mounting: Surface Mount
• Reverse Breakdown Voltage: 5V
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Figure 26. Minimum LED skew for zero dead time.
Figure 27. Waveforms for dead time.
15
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
V
V
I
I
V
V
OUT1
OUT2
LED1
LED2
I
I
OUT1
OUT2
LED1
LED2
(t
PHL-
PDD* MAX
PDD* MAX = (t
Q1 ON
Q2 OFF
t
t
PHL MIN
PHL MAX
t
PHL MAX
t
PLH
Q2 OFF
Q1 ON
)
MAX
MAXIMUM DEAD TIME
(DUE TO OPTOCOUPLER)
= (t
= (t
= PDD* MAX – PDD* MIN
t
PHL MAX
PHL MAX
PLH MIN
PHL
t
MIN
PLH
t
PLH MAX
- t
PLH
- t
- t
)
PHL MIN
PLH MIN
MAX
= t
Q1 OFF
Q2 ON
PHL MAX
) + (t
) – (t
Q1 OFF
Q2 ON
PLH MAX
PHL MIN
- t
PLH MIN
- t
- t
PLH MAX
PLH MIN
)
)