HCPL-7720-500E Avago Technologies US Inc., HCPL-7720-500E Datasheet - Page 11
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HCPL-7720-500E
Manufacturer Part Number
HCPL-7720-500E
Description
OPTOCOUPLER 25MBD 8NS 8-SMD
Manufacturer
Avago Technologies US Inc.
Datasheet
1.HCPL-0720-000E.pdf
(19 pages)
Specifications of HCPL-7720-500E
Voltage - Isolation
3750Vrms
Number Of Channels
1, Unidirectional
Current - Output / Channel
10mA
Data Rate
25MBd
Propagation Delay High - Low @ If
20ns
Input Type
Logic
Output Type
Push-Pull, Totem-Pole
Mounting Type
Surface Mount, Gull Wing
Package / Case
8-SMD Gull Wing
No. Of Channels
1
Optocoupler Output Type
Gate Drive
Input Current
10µA
Output Voltage
5V
Opto Case Style
SMD
No. Of Pins
8
Propagation Delay Low-high
40ns
Isolation Voltage
3.75kV
Number Of Elements
1
Baud Rate
25Mbps
Output Current
10mA
Package Type
PDIP SMD
Operating Temp Range
-40C to 85C
Power Dissipation
150mW
Propagation Delay Time
40ns
Pin Count
8
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HCPL-7720-500E
Manufacturer:
AVAGO
Quantity:
26 000
Part Number:
HCPL-7720-500E
Manufacturer:
AVAGO/安华高
Quantity:
20 000
Application Information
Bypassing and PC Board Layout
The HCPL-772X/072X optocouplers are extremely easy
to use. No external interface circuitry is required because
the HCPL-772X/072X use high-speed CMOS IC technol-
ogy allowing CMOS logic to be connected directly to the
inputs and outputs.
As shown in Figure 10, the only external components
Figure 10. Recommended printed circuit board layout.
Figure 11. Recommended printed circuit board layout.
Propagation Delay, Pulse-Width Distortion and Propagation Delay
Skew
Propagation Delay is a figure of merit which describes
how quickly a logic signal propagates through a sys-
tem. The propaga tion delay from low to high (t
amount of time required for an input signal to propa-
gate to the output, causing the output to change from
Figure 12.
11
GND
INPUT
OUTPUT
V
V
DD1
DD1
V
V
1
I
I
V
V
O
I
GND
C1
1
10%
NC
C1, C2 = 0.01 μF TO 0.1 μF
C1
1
2
3
4
90%
t
PLH
t
PHL
8
7
6
5
NC
90%
GND
50%
C2
10%
2
PLH
) is the
V
V
5 V CMOS
0 V
V
2.5 V CMOS
V
DD2
O
OH
OL
required for proper operation are two bypass capaci-
tors. Capacitor values should be between 0.01 μF and
0.1 μF. For each capacitor, the total lead length between
both ends of the capacitor and the power-supply pins
should not exceed 20 mm. Figure 11 illustrates the rec-
ommended printed circuit board layout for the HPCL-
772X/072X.
low to high. Similarly, the propagation delay from high
to low (t
signal to propagate to the output, causing the output to
change from high to low. See Figure 12.
C2
C1, C2 = 0.01 μF TO 0.1 μF
PHL
) is the amount of time required for the input
V
V
GND
DD2
O
2