SDCFIF-004G-388 SanDisk, SDCFIF-004G-388 Datasheet - Page 32
![COMPACT FLASH IND 4GB FIXED](/photos/7/83/78341/mfg_sdcf_series_sml.jpg)
SDCFIF-004G-388
Manufacturer Part Number
SDCFIF-004G-388
Description
COMPACT FLASH IND 4GB FIXED
Manufacturer
SanDisk
Datasheet
1.SDCFCF-001G-388.pdf
(97 pages)
Specifications of SDCFIF-004G-388
Memory Size
4GB
Memory Type
CompactFLASH
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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SanDisk Industrial Grade CompactFlash 5000
Table 20 contains the specification information related to the I/O Write Timing
Diagram.
a
3.3.10
The following sections provide valuable information on the True IDE mode.
De-skewing
The host will provide cable de-skewing for all signals originating from the
device. The device will provide cable de-skewing for all signals originating from
the host.
All timing values and diagrams are shown and measured at the connector of
the selected device.
Transfer Timing
The minimum cycle time supported by devices in PIO Mode 3, 4 and Multiword
DMA Mode 1, 2 respectively will always be greater than or equal to the
minimum cycle time defined by the associated mode (e.g., a device supporting
PIO Mode 4 timing will not report a value less than 120 ns, the minimum cycle
time defined for PIO mode 4 timings).
Register Transfers
Figure 9 defines the relationships between the interface signals for register
transfers. For PIO Modes 3 and above, the minimum value of t
Word 68 in the IDENTIFY DEVICE parameter list. Table 22 defines the
minimum value that will be placed in Word 68. In Figure 9 all signals are
shown with the asserted condition facing the top of the page. The negated
condition is shown towards the bottom of the page relative to the asserted
condition.
© 2007 SanDisk® Corporation
The maximum load on -IOIS16 is 1 LSTTL with 50 pF total load.
Data Setup before -IOWR
Data Hold following -IOWR
-IOWR Width Time
Address Setup before -IOWR
Address Hold following -IOWR
-CE Setup before -IOWR
-CE Hold following -IOWR
-REG Setup before -IOWR
-REG Hold following -IOWR
-IOIS16 Delay falling from Address
-IOIS16 Delay rising from -IORD
-IOIS16 Delay falling from Address
-IOIS16 Delay rising from Address
3) D[15::0] signifies data provided by the host system to the
True IDE Mode
CompactFlash Memory Card.
Item
Table 20: I/O Write Timing Specification
tdrIOIS16(ADR)
tdfIOIS16(ADR)
tdfIOIS16(ADR)
tsuREG(IOWR)
thREG(IOWR)
tsuCE(IOWR)
IOIS16(ADR)
thCE(IOWR)
tsuA(IOWR)
tsu (IOWR)
thA(IOWR)
tw (IOWR)
th (IOWR)
Symbol
tdr-
25
IEEE Symbol
tlWHRGH
tRGLIWL
tlWLIWH
tlWHAX
tlWHEH
tDVIWL
tAVIWL
tWHDX
tELIWL
tAVISH
tAVISH
tAVISL
tAVISL
Min. (ns)
165
60
30
70
20
20
5
5
0
0
is specified by
Max. (ns)
Product Manual
35
35
35
35
a
July 2007
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