MT16LSDF6464HY-133D2 Micron Technology Inc, MT16LSDF6464HY-133D2 Datasheet
MT16LSDF6464HY-133D2
Specifications of MT16LSDF6464HY-133D2
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MT16LSDF6464HY-133D2 Summary of contents
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... PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. MT16LSDF3264(L)H – 256MB MT16LSDF6464(L)H – 512MB For the latest data sheet, please refer to the Micron site: www.micron.com/products/modules Figure 1: 144-Pin SODIMM (MO-190) PCB height: 1.25in (31.75mm) Options • Self refresh current ...
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Table 3: Part Numbers PART NUMBER MT16LSDF3264(L)HG-13E_ MT16LSDF3264(L)HY-13E_ MT16LSDF3264(L)HG-133_ MT16LSDF3264(L)HY-133_ MT16LSDF3264(L)HG-10E_ MT16LSDF3264(L)HY-10E_ MT16LSDF6464(L)HG-13E_ MT16LSDF6464(L)HY-13E_ MT16LSDF6464(L)HG-133_ MT16LSDF6464(L)HY-133_ MT16LSDF6464(L)HG-10E_ MT16LSDF6464(L)HY-10E_ NOTE: 1. The designators for component and PCB revision are the last two characters of each part number Consult factory for current ...
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... WE# 103 S0# 105 S1# 107 SS NOTE: 1. Pin Connect for 256MB modules, or A12 for 512MB modules. Figure 2: Pin Locations (144-Pin SODIMM) Front View PIN 1 (all odd pins) pdf: 09005aef807924d2, source: 09005aef807924f1 SDF16C32_64x64HG.fm - Rev. E 4/06 EN Table 5: PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL NC 109 ...
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Table 6: Pin Descriptions Pin numbers may not correlate with symbols; refer to the Pin Assignment tables on page 3 for more information PIN NUMBERS 65, 66, 67 RAS#, CAS#, WE# 61, 74 62, 68 69, 71 23, 24, 25, ...
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Table 6: Pin Descriptions (Continued) Pin numbers may not correlate with symbols; refer to the Pin Assignment tables on page 3 for more information PIN NUMBERS 11, 12, 27, 28, 45, 46, 63, 64, 81, 82, 101, 102, 113, 114, ...
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... DQ62 DQ DQ63 DQ V SDRAMs DD V SDRAMs SS SERIAL PD SCL U17 Standard modules use the following SDRAM devices: MT48LC16M8A2FB (256MB); MT48LC32M8A2FB (512MB) Lead-free modules use the following SDRAM devices: www.micron.com/ MT48LC16M8A2BB (256MB); MT48LC32M8A2BB (512MB) 6 256MB, 512MB (x64, DR) 144-PIN SDRAM SODIMM 0Ω CS# DQM DQM CS ...
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... SDRAMs with a syn- chronous interface (all signals are registered on the positive edge of the clock signal CK). Read and write accesses to the SDRAM modules are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the regis- tration of an ACTIVE command, which is then fol- lowed by a READ or WRITE command ...
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Mode register bits M0–M2 specify the burst length, M3 specifies the type of burst (sequential or inter- leaved), M4–M6 specify the CL, M7 and M8 specify the operating mode, M9 specifies the write burst mode, and M10 and M11 are ...
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... Cn… NOTE: 1. For full-page accesses 1,024 (both 256MB and 512MB modules) 2. For a burst length of two, A1–A9 select the block-of- two burst; A0 selects the starting column within the block. 3. For a burst length of four, A2–A9 select the block-of- four burst; A0–A1 select the starting column within the block. 4. For a burst length of eight, A3– ...
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Operating Mode The normal operating mode is selected by setting M7 and M8 to zero; the other combinations of values for M7 and M8 are reserved for future use and/or test modes. The programmed burst length applies to both READ ...
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Commands The Truth Table provides a quick reference of avail- able commands. This is followed by written descrip- tion of each command. For a more detailed Table 9: Truth Table – SDRAM Commands and DQMB Operation CKE is HIGH for ...
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Absolute Maximum Ratings Stresses greater than those listed may cause perma- nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the opera- ...
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Table 12: I Specifications and Conditions – 512MB DD Notes 11, 13; SDRAM components only; notes appear on page 16; V PARAMETER/CONDITION Operating current: Active mode; Burst = 2; READ or WRITE ...
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Table 14: Electrical Characteristics and Recommended AC Operating Conditions Notes 11, 31; notes appear on page 16; comply with PC100 and PC133 specifications, based on SDRAM device AC CHARACTERISTICS PARAMETER Access time from ...
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Table 15: AC Functional Characteristics Notes 11, 31; notes appear on page 16; comply with PC100 and PC133 specifications, based on SDRAM device PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down ...
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Notes 1. All voltages referenced This parameter is sampled MHz 25°C; pin under test biased at 1.4V dependent on output loading and cycle DD rates. Specified values are ...
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SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (see Figures 6, and 7). SPD Start Condition All ...
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Table 16: EEPROM Device Select Code Most significant bit (b7) is sent first Memory area select code (two arrays) Protection register select code Table 17: EEPROM Operating Modes MODE Current address READ Random address READ Sequential READ Byte WRITE Page ...
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Table 18: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced DDSPD PARAMETER/CONDITION Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA ...
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Table 20: Serial Presence-Detect Matrix “1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; V BYTE DESCRIPTION 0 Number of bytes used by Micron 1 Total number of SPD memory bytes 2 Memory type 3 Number of row addresses 4 Number ...
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Table 20: Serial Presence-Detect Matrix (Continued) “1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; V BYTE DESCRIPTION 31 Module rank density 32 Command and address setup time, 33 Command and address hold time, 34 Data signal input setup time, 35 ...
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Figure 10: 144-Pin SODIMM Dimensions U1 0.079 (2.00) R (2X) 0.071 (1.80) U3 (2X) 0.236 (6.00) 0.100 (2.55) 0.079 (2.00) PIN 1 83.82 (3.30) U10 U16 PIN 144 NOTE: All dimensions in inches (millimeters); Data Sheet Designation Released (No Mark): ...