MT18VDDT12872AG-40BD1 Micron Technology Inc, MT18VDDT12872AG-40BD1 Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT18VDDT12872AG-40BD1
Manufacturer Part Number
MT18VDDT12872AG-40BD1
Description
MODULE DDR SDRAM 1GB 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDDT12872AY-40BF1.pdf
(29 pages)
Specifications of MT18VDDT12872AG-40BD1
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
200MHz
Package / Case
184-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1118
reserved states should not be used because unknown
operation or incompatibility with future versions may
result.
Extended Mode Register
beyond those controlled by the mode register; these
additional functions are DLL enable/disable and out-
put drive strength. These functions are controlled via
the bits shown in Figure 6, Extended Mode Register
Definition Diagram, on page 10. The extended mode
register is programmed via the LOAD MODE REGIS-
TER command to the mode register (with BA0 = 1 and
BA1 = 0) and will retain the stored information until it
is programmed again or the device loses power. The
enabling of the DLL should always be followed by a
LOAD MODE REGISTER command to the mode regis-
ter (BA0/BA1 both LOW) to reset the DLL.
all device banks are idle and no bursts are in progress,
and the controller must wait the specified time before
initiating any subsequent operation. Violating either
of these requirements could result in unspecified oper-
ation.
DLL Enable/Disable
DLL enable is required during power-up initialization
and upon returning to normal operation after having
disabled the DLL for the purpose of debug or evalua-
tion. (When the device exits self refresh mode, the DLL
is enabled automatically.) Any time the DLL is enabled,
200 clock cycles must occur before a READ command
can be issued.
pdf: 09005aef80814e61, source: 09005aef80a43eed
DDA18C32_64_128x72AG.fm - Rev. E 9/04 EN
The extended mode register controls functions
The extended mode register must be loaded when
The DLL must be enabled for normal operation.
256MB, 512MB, 1GB (x72, ECC, DR), PC3200
10
256MB Module
512MB, 1GB Modules
NOTE:
1. E13 and E12 (256MB), or E14 and E13 (512MB, 1GB)
2. The QFC# option is not supported.
E12
0
–
(BA1 and BA0) must be “0, 1” to select the Extended
Mode Register (vs. the base Mode Register).
E11
Figure 6: Extended Mode Register
14
0
BA1 BA0
0
–
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
E10
0 1
1
184-PIN DDR SDRAM UDIMM
13
13
BA1 BA0
1
0
–
1 1
12
12
E9
A12
0
–
11
11
E8
A11
A11
0
–
Definition Diagram
10
E7
10
0
–
A10
A10
E6 E5
0
–
9
9
Operating Mode
A9
A9
Operating Mode
0
–
8
8
A8
A8
E4
0
–
7
7
A7 A6 A5 A4 A3
A7 A6 A5 A4 A3
E3
0
–
6
6
E2
0
–
5
5
2
4
4
E1, E0
Valid
–
3
3
2
2
A2 A1 A0
A2 A1 A0
DS
DS
Operating Mode
Reserved
Reserved
1
1
©2004 Micron Technology, Inc.
DLL
DLL
0
0
E0
0
1
Extended Mode
Register (Ex)
Extended Mode
Register (Ex)
Address Bus
Address Bus
Disable
Enable
DLL