MT4VDDT1664AG-335F3 Micron Technology Inc, MT4VDDT1664AG-335F3 Datasheet - Page 16

• Manufacturer Part Number: MT4VDDT1664AG-335F3
• Description: MODULE DDR 128MB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT4VDDT1664AG-335F3

• Memory Type: DDR SDRAM
• Memory Size: 128MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 14: I
DDR SDRAM components only
Notes: 1–5, 8, 10, 12, 48; notes appear on pages 19–21; 0°C ≤ T
Table 15: Capacitance
Note: 11; notes appear on pages 19–21
pdf: 09005aef80a43556, source: 09005aef80a43534
DDA8C16_32_64x64AG.fm - Rev. D 9/04 EN
OPERATING CURRENT: One device bank; Active-Precharge;
t
and control inputs changing once every two clock cycles
OPERATING CURRENT: One device bank; Active-Read-Pre-charge; Burst = 4;
t
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks idle; Power-
down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock cycle. V
= V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active; Power-
down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device bank; Active-
Precharge;
changing twice per clock cycle; Address and other control inputs changing once
per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
(MIN); I
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One device bank
active; Address and control inputs changing once per clock cycle;
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle
AUTO REFRESH CURRENT
SELF REFRESH CURRENT: CKE ≤ 0.2V
OPERATING CURRENT: Four device bank interleaving READs (BL = 4) with auto
precharge,
inputs change only during Active, READ, or WRITE commands
Input/Output Capacitance: DQ, DQS, DM
Input Capacitance: Command and Address, S#, CKE
Input Capacitance: CK0, CK0# (Standard PCB)
Input Capacitance: CK1, CK1#; CK2, CK2# (Standard PCB)
Input Capacitance: CK0, CK0# (Low-Profile PCB)
Input Capacitance: CK1, CK1#; CK2, CK2# (Low-Profile PCB)
CK =
RC =
REF
t
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address
RC (MIN);
for DQ, DQS, and DM
OUT
t
t
= 0mA
RC = minimum
RC =
t
t
CK =
CK =
DD
t
t
CK =
RAS (MAX);
t
t
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
Specifications and Conditions – 512MB
t
CK (MIN); I
t
PARAMETER/CONDITION
RC allowed;
PARAMETER
t
CK =
OUT
t
CK (MIN); DQ, DM, and DQS inputs
= 0mA; Address and control inputs
t
CK =
t
CK (MIN); Address and control
128MB, 256MB, 512MB (x64, SR) PC3200
t
RC =
t
16
CK =
t
t
REFC =
REFC = 7.8125µs
A
≤ +70°C; V
t
RC (MIN);
t
t
t
CK =
CK =
CK (MIN);
t
RFC (MIN)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM UDIMM
t
t
CK
CK
DD
= V
IN
SYMBOL
DD
C
C
C
C
C
C
Q = +2.6V ±0.1V
I
I
I
SYM
I
I
I
IO
I
I
I
I
I
I
DD 4 W
I
I
DD 3 N
DD 4 R
I
DD 5 A
I
I
1
2
3
2
3
DD 2 P
DD 2 F
DD 3 P
DD 0
DD 1
DD 5
DD 6
DD 7
MAX
1,240
1,480
1,520
1,560
2,760
3,600
-40B
440
360
440
40
88
40
MIN
16.0
10.0
4.0
9.0
5.5
6.0
MAX
24.0
12.0
12.0
UNITS
5.0
7.5
9.0
©2004 Micron Technology. Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28, 44
21, 28, 44
UNITS
NOTES
20, 42
20, 42
20, 42
20, 44
24, 44
20, 43
pF
pF
pF
pF
pF
pF
45
41
20
9