MT9VDDF3272Y-40BG3 Micron Technology Inc, MT9VDDF3272Y-40BG3 Datasheet - Page 10

• Manufacturer Part Number: MT9VDDF3272Y-40BG3
• Description: MODULE DDR SDRAM 256MB 184-DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT9VDDF3272Y-40BG3

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 400MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
Table 9:
PDF: 09005aef8082c948/Source: 09005aef807d56a1
ddf9c32_64x72.fm - Rev. C 10/08 EN
Parameter/Condition
Operating one device bank active-precharge current:
(MIN); DQ, DM, and DQS inputs changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one device bank active-read-precharge current: Burst = 4;
(MIN);
cycle
Precharge power-down standby current: All device banks idle; Power-down mode;
t
Idle standby current: CS# = HIGH; All device banks idle;
Address and other control inputs changing once per clock cycle. VIN = VREF for DQ, DQS,
and DM
Active power-down standby current: One device bank active; Power-down mode;
t
Active standby current: CS# = HIGH; CKE = HIGH; One device bank; Active precharge;
t
cycle; Address and other control inputs changing once per clock cycle
Operating burst read current: Burst = 2; Continuous burst reads; One device bank
active; Address and control inputs changing once per clock cycle;
IOUT = 0mA
Operating burst write current: Burst = 2; Continuous burst writes; One device bank
active; Address and control inputs changing once per clock cycle;
DM, and DQS inputs changing twice per clock cycle
Auto refresh burst current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank interleaving READs;
(burst = 4) with auto precharge,
inputs change only during active READ or WRITE commands
DD
CK =
CK =
RC =
Specifications
t
t
t
RAS (MAX);
CK (MIN); CKE = (LOW)
t
CK (MIN); CKE = LOW
CK =
t
CK (MIN); IOUT = 0mA; Address and control inputs changing once per clock
I
Values are for MT46V32M8 DDR SDRAM only and are computed from values specified in the
256Mb (32 Meg x 8) component data sheet
DD
Specifications and Conditions – 256MB (Die Revision K)
t
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing twice per clock
t
RC =
t
RC (MIN);
256MB, 512MB (x72, ECC, SR) 184-Pin DDR SDRAM RDIMM
t
CK =
t
CK (MIN); Address and control
t
CK =
t
RC =
10
t
CK (MIN); CKE = HIGH;
t
t
RFC =
RFC = 7.8125µs
t
t
t
RC (MIN);
CK =
CK =
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RFC (MIN)
t
t
CK (MIN);
CK (MIN); DQ,
t
RC =
t
CK =
t
RC
t
CK
Electrical Specifications
Symbol
I
I
I
I
I
I
I
DD
I
I
DD
DD
I
DD
I
I
DD
DD
DD
DD
DD
DD
DD
DD
4W
©2002 Micron Technology, Inc. All rights reserved.
3N
4R
5A
2P
2F
3P
0
1
5
6
7
1,080 1,035
1,620 1,440
1,620 1,440
1,440 1,440
2,610 2,430
-40B
900
450
315
540
36
54
36
-335
810
450
270
495
36
54
36
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA