MT18VDDT12872Y-265D2 Micron Technology Inc, MT18VDDT12872Y-265D2 Datasheet - Page 36
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT18VDDT12872Y-265D2
Manufacturer Part Number
MT18VDDT12872Y-265D2
Description
MODULE SDRAM DDR 1GB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDDT12872Y-265D2.pdf
(39 pages)
Specifications of MT18VDDT12872Y-265D2
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
266MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
750ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
2.61A
Number Of Elements
18
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 24: Serial Presence-Detect Matrix – 2GB
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes appear on page 35
pdf: 09005aef808a331f, source: 09005aef80858037
DD18C32_64_128_256x72G.fm - Rev. E 9/04 EN
BYTE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
0
1
2
3
4
5
6
7
8
9
Number of SPD Bytes Used by Micron
Total Number of Bytes in SPD Device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of Physical Ranks on DIMM
Module Data Width
Module Data Width (Continued)
Module Voltage Interface Levels
SDRAM Cycle Time,
SDRAM Access from Clock,(
(CAS Latency = 2.5)
Module Configuration Type
Refresh Rate/Type
SDRAM Device Width (Primary SDRAM)
Error-checking SDRAM Data Width
Minimum Clock Delay, Back-to-Back Random Column
Access
Burst Lengths Supported
Number of Banks on SDRAM Device
CAS Latencies Supported
CS Latency
WE Latency
SDRAM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time,
SDRAM Access from CK,
SDRAM Cycle Time,
SDRAM Access from CK,
Minimum Row Precharge Time,
Minimum Row Active to Row Active,
Minimum RAS# to CAS# Delay,
Minimum RAS# Pulse Width,
(Note 2)
Module Rank Density
Address and Command Setup Time,
Address and Command Hold Time,
t
t
t
CK, (CAS Latency = 2.5) (See note 1)
CK (CAS Latency = 2)
CK (CAS Latency = 1.5)
DESCRIPTION
t
t
AC (CAS Latency = 2)
AC (CAS Latency = 1.5)
t
AC)
t
RAS
t
RCD
t
RP
t
IH (See note 3)
t
IS (See note 3)
t
RRD
256MB, 512MB, 1GB, 2GB (x72, ECC, SR)
36
15ns (-262/-26A/-265/-202)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0.75ns (-262/-26A/-265)
Unbuffered/Diff. Clock
184-PIN DDR SDRAM RDIMM
0.75ns (-262/-26A/-265)
20ns (-26A/-265/-202)
20ns (-26A/-265/-202)
45ns (-262/-26A/-265)
1ns (-262/-26A/-265)
ENTRY (VERSION)
Fast/Concurrent AP
1ns (262/-26A/-265)
7.5ns (-262/-26A)
10ns (-265/-202)
7ns (-262/-26A)
SDRAM DDR
7.5ns (-265)
0.8ns (-202)
0.8ns (-202)
1.1ns (-202)
1.1ns (-202)
15ns (-262)
15ns (-262)
40ns (-202)
7.8µs/SELF
SSTL 2.5V
8ns (-202)
1 clock
2, 4, 8
2, 2.5
1GB
128
256
ECC
N/A
N/A
14
11
72
2
0
8
8
4
0
1
©2004 Micron Technology, Inc. All rights reserved.
MT18VDDT25672
A0
2D
A0
A0
80
08
07
0E
0C
01
48
00
04
70
75
80
75
80
02
82
04
04
01
0E
04
0C
01
02
26
C0
75
75
80
00
00
3C
50
3C
3C
50
28
02
B0
B0