MT36LSDT25672G-13EC2 Micron Technology Inc, MT36LSDT25672G-13EC2 Datasheet - Page 20

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MT36LSDT25672G-13EC2

Manufacturer Part Number
MT36LSDT25672G-13EC2
Description
MODULE SDRAM 2GB 168DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT36LSDT25672G-13EC2

Memory Type
SDRAM
Memory Size
2GB
Speed
133MHz
Package / Case
168-DIMM
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
PDF: 09005aef80b1835d/Source: 09005aef80b18348
SD36C128_256x72G.fm - Rev. E 6/05 EN
22. V
23. The clock frequency must remain constant (stable clock is defined as a signal cycling
24. Auto precharge mode only. The precharge timing budget (
25. Precharge mode only.
26. JEDEC and PC100 specify three clocks.
27.
28. Parameter guaranteed by design.
29. For -133, CL = 3 and
30. CKE is HIGH during refresh command period
31. Refer to component data sheet for timing waveforms.
32. The value for
33. Leakage number reflects the worst case leakage possible through the module pin, not
34. This AC timing function will show an extra clock cycle when in registered mode.
cannot be greater than one third of the cycle rate. V
a pulse width ≤ 3ns for all inputs except A12. V
V
third of the cycle rate.
within timing constraints specified for the clock pin) during access or precharge
states (READ, WRITE, including
used to reduce the data rate.
and 7.5ns for -133 after the first clock delay, after the last WRITE is executed.
t
limit is actually a nominal value and does not result in a fail value.
t
what each memory device contributes.
AC for -133/-13E at CL = 3 with no load is 4.6ns and is guaranteed by design.
RC -
IH
DD
overshoot: V
Q + 1V for a pulse width ≤ 3ns, and the pulse width cannot be greater than one
t
RP = 45ns.
t
RAS used in -13E speed grade modules is calculated from
IH
(MAX) = V
t
CK = 7.5ns; for -13E, CL = 2 and
1GB, 2GB: (x72, ECC, DR) 168-Pin SDRAM RDIMM
20
DD
Q + 2V for a pulse width ≤ 3ns, and the pulse width
t
WR, and PRECHARGE commands). CKE may be
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
IH
RFC (MIN) else CKE is LOW. The I
overshoot for pin A12 is limited to
IL
t
undershoot: V
CK = 7.5ns.
t
RP) begins 7ns for -13E;
©2002 Micron Technology, Inc. All rights reserved.
IL
(MIN) = -2V for
Notes
DD
6

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