MT9HTF6472FY-53EB4D3 Micron Technology Inc, MT9HTF6472FY-53EB4D3 Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT9HTF6472FY-53EB4D3
Manufacturer Part Number
MT9HTF6472FY-53EB4D3
Description
MODULE DDR2 512MB 240FBDIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT9HTF6472FY-53EB4E3.pdf
(16 pages)
Specifications of MT9HTF6472FY-53EB4D3
Memory Type
DDR2 SDRAM
Memory Size
512MB
Speed
533MT/s
Package / Case
240-FBDIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 19:
PDF: 09005aef81a2f1eb/Source: 09005aef81a2f20c
HTF9C64_128x72F.fm - Rev. B 9/07 EN
120–121 Module ID: Module manufacturing date
122–125 Module ID: Module serial number
128–145 Module part number
146–147 Module revision code
148–149 DRAM manufacturer’s JEDEC ID code
152–175 Reserved for manufacturer-specific data
176–255 Reserved for customer-specific data
42–78
Byte
117
118
119
33
34
35
36
37
38
39
40
41
79
Description
Bits 7:4: ΔT
MAX case temperature and baseline MAX case temperature), the
baseline MAX case temperature is 85°C; Bits 3:0: DT4R4W Δ (case
temperature rise difference between I
READ and I
Thermal resistance of DRAM device package from top (case) to
ambient (PSI T-A DRAM) at still air condition based on JESD51-2
standard
DT0/T
due to I
temperature; Bit 1: Double refresh mode bit; Bit 0: High
temperature self refresh rate support indication
DT2N/DT2Q: Case temperature rise from ambient due to
I
I
DT2P: Case temperature rise from ambient due to I
PRECHARGE power-down operation
DT3N: Case temperature rise from ambient due to I
STANDBY operation
DT4R/mode bit, bits 7:1: Case temperature rise from ambient due
to I
specify if DT4W is greater or less than DT4R
DT5B: Case temperature rise from ambient due to I
REFRESH operation
DT7: Case temperature rise from ambient due to I
interleave READ MODE operation
FBDIMM reserved bytes
FBDIMM ODT definition
Module ID: Module manufacturer’s JEDEC ID code
Module ID: Module manufacturer’s JEDEC ID code
Module ID: Module manufacturing location
DD
DD
Serial Presence-Detect Matrix – DRAM Device and Module (continued)
2N precharge STANDBY operation for UDIMM and due to
2Q/precharge quiet STANDBY operation for RDIMM
DD
C
4R/page open BURST READ operation; Bit 0: Mode bit to
mode bits: Bits 7:2: Case temperature rise from ambient
DD
0/ACTIVATE PRECHARGE operation minus 2.8°C offset
C
DD
(MAX) (DRAM case temperature difference between
4W/page open burst WRITE operations)
512MB, 1GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM
DD
4R/page open burst
13
DD
DD
DD
DD
7/bank
2P/
5B/BURST
3N/ACTIVE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MICRON
MICRON
MICRON
Entry
1–12
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Serial Presence-Detect
©2005 Micron Technology, Inc. All rights reserved.
Variable
Variable
Variable
Variable
512MB
01–0C
802C
data
data
data
data
0A
0D
2C
52
32
04
0E
18
0F
12
00
01
80
FF
FF
Variable
Variable
Variable
Variable
01–0C
802C
data
data
data
data
1GB
0A
0B
2C
51
31
04
0F
18
12
15
00
01
80
FF
FF