MT18HVF12872PY-667D1 Micron Technology Inc, MT18HVF12872PY-667D1 Datasheet

MODULE DDR2 512MB 240-DIMM

MT18HVF12872PY-667D1

Manufacturer Part Number
MT18HVF12872PY-667D1
Description
MODULE DDR2 512MB 240-DIMM
Manufacturer
Micron Technology Inc

Specifications of MT18HVF12872PY-667D1

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
667MT/s
Package / Case
240-DIMM
Main Category
DRAM Module
Sub-category
DDR2 SDRAM
Module Type
240RDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
45ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Operating Current
3.24A
Number Of Elements
18
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DDR2 VLP Registered DIMM (RDIMM)
MT18HVF12872(P) – 1GB
For component data sheets, refer to Micron's Web site:
Features
• Fits with ATCA form factor
• 240-pin, very low profile registered dual in-line
• Fast data transfer rates: PC2-3200, PC2-4200, or
• 1GB (128 Meg x 72)
• Supports ECC error detection and correction
• V
• V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Single rank
• Multiple internal device banks for concurrent
• Programmable CAS# latency (CL)
• Posted CAS# additive latency (AL)
• WRITE latency = READ latency - 1
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
Table 1:
PDF: 09005aef82255aba/Source: 09005aef81c753af
HVF18C128x72.fm - Rev. C 3/07 EN
memory module (VLP RDIMM)
PC2-5300
operation
Speed
Grade
DD
DDSPD
-667
-53E
-40E
= V
DD
= +1.7V to +3.6V
Q = +1.8V
Industry Nomenclature
Key Timing Parameters
PC2-5300
PC2-4200
PC2-3200
t
CK
CL = 5
667
1GB (x72, ECC, SR) 240-Pin DDR2 SDRAM VLP RDIMM
Data Rate (MT/s)
www.micron.com
CL = 4
533
533
400
1
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Parity
• Operating temperature
• Package
• Frequency/CAS latency
• PCB height
PCB height: 17.9mm (0.70in)
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
240-pin DIMM (Pb-free)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
– 5.0ns @ CL = 3 (DDR2-400)
17.9mm (0.70in)
CL = 3
400
400
400
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. CL = CAS (READ) latency; registered mode
module offerings.
will add one clock cycle to CL.
240-Pin DIMM (ATCA Form Factor)
t
(ns)
RCD
15
15
15
A
A
1
2
≤ +85°C)
≤ +70°C)
©2003 Micron Technology, Inc. All rights reserved.
(ns)
t
15
15
15
RP
Marking
Features
None
-667
-53E
-40E
P
Y
I
(ns)
t
55
55
55
RC

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MT18HVF12872PY-667D1 Summary of contents

Page 1

DDR2 VLP Registered DIMM (RDIMM) MT18HVF12872(P) – 1GB For component data sheets, refer to Micron's Web site: Features • Fits with ATCA form factor • 240-pin, very low profile registered dual in-line memory module (VLP RDIMM) • Fast data transfer ...

Page 2

... Refresh count Row address Device bank address Device page size per bank Device configuration Column address Module rank address Table 3: Part Numbers and Timing Parameters 1GB Modules Base Device: MT47H128M4 2 Part Number MT18HVF12872(P)Y-667__ MT18HVF12872(P)Y-53E__ MT18HVF12872(P)Y-40E__ Notes: 1. Data sheets for the base devices can be found on Micron’s Web site. ...

Page 3

Pin Assignments and Descriptions Table 4: Pin Assignments 240-Pin VLP RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ19 61 REF DQ0 33 DQ24 63 4 DQ1 ...

Page 4

Table 5: Pin Description Symbol Type ODT0 Input On-die termination: ODT (registered HIGH) enables termination resistance internal to (SSTL_18) the DDR2 SDRAM. When enabled, ODT is only applied to the following pins: DQ, DQS, DQS#, and CB. The ODT input ...

Page 5

Functional Block Diagram Figure 2: Functional Block Diagram V SS RS0# U16 S0# RS0#: DDR2 SDRAM R BA0–BA1 RBA0–RBA1: DDR2 SDRAM E A0–A13 RA0–RA13: DDR2 SDRAM G RAS# RRAS#: DDR2 SDRAM I CAS# RCAS#: DDR2 SDRAM S WE# RWE#: DDR2 ...

Page 6

... READs and by the memory controller during WRITEs. DQS is edge- aligned with data for READs and center-aligned with data for WRITEs. DDR2 SDRAM modules operate from a differential clock (CK and CK#); the crossing of CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. ...

Page 7

... Simulations are significantly more accurate and realistic than a gross estimation of module capacitance when inductance and delay parameters associated with trace lengths are used in simulations. JEDEC modules are currently designed using simulations to close timing budgets. Component AC Timing and Operating Conditions Recommended AC operating conditions are given in the DDR2 component data sheets. Component specifications are available on Micron’ ...

Page 8

I Specifications DD Table 8: DDR2 I Specifications and Conditions – 1GB DD Values shown for MT47H128M4 DDR2 SDRAM only and are computed from values specified in the 512Mb (128 Meg x 4) component data sheet Parameter/Condition Operating one bank ...

Page 9

Register and PLL Specifications Table 9: Register Specifications SSTU32865 devices or equivalent JESD82-19 Parameter Symbol high-level IH DC input voltage DC low-level input voltage high-level IH AC ...

Page 10

Table 10: PLL Specifications CU877 device or equivalent JESD82-8.01 Parameter Symbol V DC high-level input voltage DC low-level input voltage V Input voltage (limits high-level input voltage low-level input voltage V Input differential-pair cross voltage ...

Page 11

Serial Presence-Detect Table 12: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input ...

Page 12

Table 14: Serial Presence-Detect Matrix Byte 0 Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on SDRAM 4 Number of column addresses on SDRAM ...

Page 13

Table 14: Serial Presence-Detect Matrix (continued) Byte 33 Address and command hold time, 34 Data/data mask input setup time, 35 Data/data mask input hold time Write recovery time WRITE-to-READ command delay, 38 READ-to-PRECHARGE command delay, 39 ...

Page 14

Module Dimensions Figure 3: 240-Pin DDR2 DIMM 2.0 (0.079) R (4X 2.50 (0.098) D (2X) 2.30 (0.091) TYP PIN 1 1.0 (0.039) 1.0 (0.039) TYP TYP U12 U13 U14 3.05 (0.012) TYP PIN 240 2.20 (0.087) TYP ...

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