MT72HTS1G72PY-53EE1 Micron Technology Inc, MT72HTS1G72PY-53EE1 Datasheet - Page 8

• Manufacturer Part Number: MT72HTS1G72PY-53EE1
• Description: MODULE DDR2 8GB 240-RDIMM
• Manufacturer: Micron Technology Inc

Specifications of MT72HTS1G72PY-53EE1

• Memory Type: DDR2 SDRAM
• Memory Size: 8GB
• Speed: 533MT/s
• Package / Case: 240-RDIMM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

I
Table 8:
PDF: 09005aef82d283a8/Source: 09005aef82d28271
HTS72C1Gx72.fm - Rev. A 8/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
commands; Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
BL = 4, CL = CL (I
t
valid commands; Address bus inputs are switching; Data pattern is same as
I
Precharge power-down current: All device banks idle;
CKE is LOW; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data
bus inputs are switching
Active power-down current: All device banks open;
t
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
valid commands; Other control and address bus inputs are switching; Data
bus inputs are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
bus inputs are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst
reads; I
t
valid commands; Address bus inputs are switching; Data bus inputs are
switching
Burst refresh current:
t
control and address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and
address bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads; I
t
HIGH, S# is HIGH between valid commands; Address bus inputs are stable
during deselects; Data bus inputs are switching
DD
DD
RC =
RAS =
CK =
RAS =
RP =
RAS =
RFC (I
CK =
4W
Specifications
t
t
t
t
RP (I
DD
RC (I
CK (I
CK (I
t
t
t
OUT
OUT
RAS MIN (I
RAS MAX (I
RAS MAX (I
) interval; CKE is HIGH, S# is HIGH between valid commands; Other
DD
DD
DD
= 0mA; BL = 4, CL = CL (I
= 0mA; BL = 4, CL = CL (I
DD
); CKE is HIGH, S# is HIGH between valid commands; Address
),
); CKE is LOW; Other control and address bus
DDR2 I
Values are shown for the MT47H512M4THN DDR2 SDRAM only and are computed from values specified in
the MT47H256M4 2Gb TwinDie™ component data sheet
),
t
t
RAS =
RC =
DD
DD
), AL = 0;
DD
DD
),
t
),
),
DD
t
RC (I
RAS MIN (I
t
RCD =
t
t
DD
RP =
RP =
t
CK =
Specifications and Conditions – 8GB
), AL = 0;
DD
t
CK =
),
t
t
RP (I
RP (I
t
t
RCD (I
CK (I
t
RRD =
DD
t
DD
DD
CK (I
DD
DD
t
DD
); CKE is HIGH, S# is HIGH between valid
CK =
DD
); CKE is HIGH, S# is HIGH between
); CKE is HIGH, S# is HIGH between
), AL = 0;
), AL =
); REFRESH command at every
t
RRD (I
); CKE is HIGH, S# is HIGH between
DD
t
),
CK (I
t
RC =
t
DD
RCD (I
DD
t
),
CK =
),
t
t
t
RCD =
RC (I
CK =
t
t
DD
RAS =
CK =
t
CK =
t
CK (I
) - 1 ×
8GB (x72, ECC, QR) 240-Pin DDR2 SDRAM RDIMM
DD
t
CK (I
t
t
),
t
RCD (I
OUT
CK (I
CK =
t
t
DD
t
CK (I
RAS MAX (I
CK =
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
8
t
DD
),
CK (I
= 0mA;
DD
t
),
DD
DD
CK (I
t
),
CK (I
DD
); CKE is
); CKE is
);
DD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
DD
);
);
),
Symbol
I
I
I
I
I
I
I
CDD
CDD
CDD
CDD
I
I
CDD
CDD
CDD
I
I
I
CDD
CDD
CDD
CDD
CDD
4W
2Q
2N
3N
2P
3P
4R
0
1
5
6
7
2,592
2,862
1,782
1,782
1,008
2,052
3,222
3,222
4,932
6,102
-667
594
648
594
Electrical Specifications
©2007 Micron Technology, Inc. All rights reserved.
2,322
2,772
1,782
1,782
1,008
1,872
3,042
3,042
4,842
5,922
-53E
594
648
594
2,232
2,592
1,602
1,602
1,008
1,692
2,592
2,592
4,662
5,652
-40E
594
648
594
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA