HDSP-2179 Avago Technologies US Inc., HDSP-2179 Datasheet - Page 6

• Manufacturer Part Number: HDSP-2179
• Description: DISPLAY 5X7 8DIGIT .2" 32DIP ORN
• Manufacturer: Avago Technologies US Inc.
• Series: HDSP-2179r

Specifications of HDSP-2179

• Package / Case: 32-DIP
• Color: Orange
• Size / Dimension: 1.68" x 0.77" (42.59mm x 19.58mm)
• Display Type: Alphanumeric
• Number Of Digits/alpha: 8
• Digit/alpha Size: 0.20" (5mm)
• Character Format: Dot Matrix
• Character Size: 5mm
• Led Color: Orange
• Luminous Intensity: 7.5mcd
• No. Of Digits / Alpha: 8
• Display Area Width: 42.72mm
• Display Area Height: 9.91mm
• Number Of Digits: 8
• Illumination Color: Orange
• Wavelength: 602 nm
• Operating Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Common Pin: -
• Lead Free Status / Rohs Status: Details

AC Timing Characteristics over Temperature Range
V
Reference
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
–
Notes:
1. Worst case values occur at an IC junction temperature of 150 C.
2. For designers who do not need to read from the display, the Read line can be tied to V
3. Changing the logic levels of the Address lines when CE = “0” may cause erroneous data to be entered into the Character RAM, regardless of the
4. The display must not be accessed until after 3 clock pulses (110 s min. using the internal refresh clock) after the rising edge of the reset line.
6
DD
logic levels of the WR and RD lines.
= 4.5 to 5.5 V unless otherwise specified
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ACC
ACS
CE
ACH
CER
CES
CEH
W
WD
DH
R
RD
DF
RC
Description
Display Access Time
Address Setup Time to Chip Enable
Chip Enable Active Time
Address Hold Time to Chip Enable
Chip Enable Recovery Time
Chip Enable Active Prior to Rising Edge of
Chip Enable Hold Time to Rising Edge of
Read/Write Signal
Write Active Time
Data Valid Prior to Rising Edge of Write Signal
Data Write Hold Time
Chip Enable Active Prior to Valid Data
Read Active Prior to Valid Data
Read Data Float Delay
Reset Active Time
Write
Read
Write
Read
Write
Read
[2,3]
[4]
[2,3]
[2,3]
DD
and the Write and Chip Enable lines can be tied together.
[1,2]
Min.
210
230
10
140
160
20
60
140
160
0
100
50
20
160
75
10
300
[1]
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns